LCD working; simple test

6 files changed, 207 insertions, 62 deletions

diff --git a/firmware/Makefile b/firmware/Makefile
index 919d167..5aec099 100644
--- a/firmware/Makefile
+++ b/firmware/Makefile
@@ -13,6 +13,7 @@ CFLAGS:=\
 	-Wl,--script=p$(MCU).gld\
 	-Wl,--gc-sections\
 	-Wl,--stack=16\
+	-Wl,--heap=2048\
 	-Wl,--local-stack\
 	-Wl,--check-sections\
 	-Wl,--data-init\
@@ -31,6 +32,7 @@ _HEX:=main.hex
 HEX:=$(patsubst %,$(ODIR)/%,$(_HEX))
 
 _DEPS:=\
+	init.h\
 	t6963c_specific.h\
 	t6963c/t6963c.h\
 	t6963c/terminal.h
diff --git a/firmware/init.c b/firmware/init.c
new file mode 100644
index 0000000..04e27a6
--- /dev/null
+++ b/firmware/init.c
@@ -0,0 +1,73 @@
+#include <xc.h>
+
+#include "t6963c_specific.h"
+#include "t6963c/t6963c.h"
+
+void init_clock(void) {
+	// CPDIV 1:1; RCDIV FRC/2; DOZE 1:8; G1CLKSEL disabled; DOZEN disabled; ROI disabled;
+	CLKDIV = 0x3100;
+	// GCLKDIV 1;
+	CLKDIV2 = 0x0000;
+}
+
+void init_pins(void) {
+	LATB = 0x00;
+	TRISB = 0xFFFF;
+	LATC = 0x00;
+	TRISC = 0xF000;
+	LATD = 0x00;
+	TRISD = 0x0AFF;
+	LATE = 0x00;
+	TRISE = 0xFF;
+	LATF = 0x00;
+	TRISF = 0xBB;
+	LATG = 0x00;
+	TRISG = 0x038C;
+
+	/****************************************************************************
+	 * Setting the Analog/Digital Configuration SFR
+	 ***************************************************************************/
+	ANSB = 0x3F;
+	ANSC = 0x6000;
+	ANSD = 0xC0;
+	ANSF = 0x01;
+	ANSG = 0x00;
+
+	/****************************************************************************
+	 * Set the PPS
+	 ***************************************************************************/
+	__builtin_write_OSCCONL(OSCCON & 0xbf); // unlock PPS
+	RPOR1bits.RP2R = 0x03; // RD8->UART1:U1TX
+	RPINR18bits.U1RXR = 0x04; // RD9->UART1:U1RX
+	RPOR1bits.RP3R = 0x04; // RD10->UART1:U1RTS
+	RPINR18bits.U1CTSR = 0x0C; // RD11->UART1:U1CTS
+	RPOR10bits.RP21R = 0x07; // RG6->SPI1:SDO1
+	RPINR20bits.SDI1R = 0x1A; // RG7->SPI1:SDI1
+	RPOR9bits.RP19R = 0x08; // RG8->SPI1:SCK1OUT
+	RPOR13bits.RP27R = 0x09; // RG9->SPI1:SS1OUT
+	__builtin_write_OSCCONL(OSCCON | 0x40); // lock   PPS
+}
+
+void init_lcd(void) {
+	t6963c_init();
+	t6963c_clear();
+}
+
+void init_uart(void) {
+	// STSEL 1; IREN disabled; PDSEL 8N; UARTEN enabled; RTSMD disabled; RXINV disabled; USIDL disabled; WAKE disabled; ABAUD disabled; LPBACK disabled; BRGH enabled; UEN TX_RX;
+	U1MODE = 0x8008;
+	// OERR NO_ERROR_cleared; UTXISEL0 TX_ONE_CHAR; URXISEL RX_ONE_CHAR; UTXBRK COMPLETED; UTXEN disabled; ADDEN disabled; UTXINV disabled;
+	U1STA = 0x0000;
+	// U1TXREG 0x0000;
+	U1TXREG = 0x0000;
+	// U1RXREG 0x0000;
+	U1RXREG = 0x0000;
+	// Baud Rate = 115200; BRG 34;
+	U1BRG = 0x0022;
+}
+
+void init(void) {
+	init_clock();
+	init_pins();
+	init_lcd();
+}
diff --git a/firmware/init.h b/firmware/init.h
new file mode 100644
index 0000000..22dc5c2
--- /dev/null
+++ b/firmware/init.h
@@ -0,0 +1,34 @@
+#define FOSC 8000000ULL
+#define FCY (FOSC * 4)
+#include <libpic30.h>
+
+// CONFIG1
+#pragma config WPCFG = WPCFGDIS  // Write Protect Configuration Page Select->Last page (at the top of program memory) and Flash Configuration Words are not write-protected
+#pragma config WPDIS = WPDIS     // Segment Write Protection Disable->Segmented code protection is disabled
+#pragma config WPFP = WPFP255    // Write Protection Flash Page Segment Boundary->Highest Page (same as page 170)
+#pragma config SOSCSEL = EC      // Secondary Oscillator Power Mode Select->External clock (SCLKI) or Digital I/O mode(
+#pragma config ALTPMP = ALPMPDIS // Alternate PMP Pin Mapping->EPMP pins are in default location mode
+#pragma config WPEND = WPENDMEM  // Segment Write Protection End Page Select->Protected code segment upper boundary is at the last page of program memory; the lower boundary is the code page specified by WPFP
+#pragma config WUTSEL = LEG      // Voltage Regulator Wake-up Time Select->Default regulator start-up time is used
+
+// CONFIG2
+#pragma config POSCMOD = NONE    // Primary Oscillator Select->Primary oscillator is disabled
+#pragma config FCKSM = CSDCMD    // Clock Switching and Fail-Safe Clock Monitor->Clock switching and Fail-Safe Clock Monitor are disabled
+#pragma config OSCIOFNC = ON     // OSCO Pin Configuration->OSCO/CLKO/RC15 functions as port I/O (RC15)
+#pragma config PLL96MHZ = ON     // 96MHz PLL Startup Select->96 MHz PLL is enabled automatically on start-up
+#pragma config PLLDIV = NODIV    // 96 MHz PLL Prescaler Select->Oscillator input is used directly (4 MHz input)
+#pragma config IOL1WAY = ON      // IOLOCK One-Way Set Enable->The IOLOCK bit (OSCCON<6>) can be set once, provided the unlock sequence has been completed. Once set, the Peripheral Pin Select registers cannot be written to a second time.
+#pragma config FNOSC = FRCPLL    // Initial Oscillator Select->Fast RC Oscillator with Postscaler and PLL module (FRCPLL)
+#pragma config IESO = ON         // Internal External Switchover->IESO mode (Two-Speed Start-up) is enabled
+
+// CONFIG1
+#pragma config WDTPS = PS32768   // Watchdog Timer Postscaler->1:32,768
+#pragma config GCP = OFF         // General Segment Code Protect->Code protection is disabled
+#pragma config FWDTEN = OFF      // Watchdog Timer->Watchdog Timer is disabled
+#pragma config ICS = PGx1        // Emulator Pin Placement Select bits->Emulator functions are shared with PGEC1/PGED1
+#pragma config WINDIS = OFF      // Windowed WDT->Standard Watchdog Timer enabled,(Windowed-mode is disabled)
+#pragma config JTAGEN = OFF      // JTAG Port Enable->JTAG port is disabled
+#pragma config FWPSA = PR128     // WDT Prescaler->Prescaler ratio of 1:128
+#pragma config GWRP = OFF        // General Segment Write Protect->Writes to program memory are allowed
+
+void init(void);
diff --git a/firmware/main.c b/firmware/main.c
index d85cfe1..d03b3e2 100644
--- a/firmware/main.c
+++ b/firmware/main.c
@@ -1,52 +1,89 @@
 #include <xc.h>
-#include "t6963c_specific.h"
+
+#include "init.h"
+
 #include "t6963c/t6963c.h"
+#include "t6963c/terminal.h"
+
+static Terminal* term;
 
-// CONFIG1
-#pragma config WPCFG = WPCFGDIS  // Write Protect Configuration Page Select->Last page (at the top of program memory) and Flash Configuration Words are not write-protected
-#pragma config WPDIS = WPDIS     // Segment Write Protection Disable->Segmented code protection is disabled
-#pragma config WPFP = WPFP255    // Write Protection Flash Page Segment Boundary->Highest Page (same as page 170)
-#pragma config SOSCSEL = EC      // Secondary Oscillator Power Mode Select->External clock (SCLKI) or Digital I/O mode(
-#pragma config ALTPMP = ALPMPDIS // Alternate PMP Pin Mapping->EPMP pins are in default location mode
-#pragma config WPEND = WPENDMEM  // Segment Write Protection End Page Select->Protected code segment upper boundary is at the last page of program memory; the lower boundary is the code page specified by WPFP
-#pragma config WUTSEL = LEG      // Voltage Regulator Wake-up Time Select->Default regulator start-up time is used
-
-// CONFIG2
-#pragma config POSCMOD = NONE    // Primary Oscillator Select->Primary oscillator is disabled
-#pragma config FCKSM = CSDCMD    // Clock Switching and Fail-Safe Clock Monitor->Clock switching and Fail-Safe Clock Monitor are disabled
-#pragma config OSCIOFNC = ON     // OSCO Pin Configuration->OSCO/CLKO/RC15 functions as port I/O (RC15)
-#pragma config PLL96MHZ = ON     // 96MHz PLL Startup Select->96 MHz PLL is enabled automatically on start-up
-#pragma config PLLDIV = NODIV    // 96 MHz PLL Prescaler Select->Oscillator input is used directly (4 MHz input)
-#pragma config IOL1WAY = ON      // IOLOCK One-Way Set Enable->The IOLOCK bit (OSCCON<6>) can be set once, provided the unlock sequence has been completed. Once set, the Peripheral Pin Select registers cannot be written to a second time.
-#pragma config FNOSC = FRCPLL    // Initial Oscillator Select->Fast RC Oscillator with Postscaler and PLL module (FRCPLL)
-#pragma config IESO = ON         // Internal External Switchover->IESO mode (Two-Speed Start-up) is enabled
-
-// CONFIG1
-#pragma config WDTPS = PS32768   // Watchdog Timer Postscaler->1:32,768
-#pragma config GCP = OFF         // General Segment Code Protect->Code protection is disabled
-#pragma config FWDTEN = OFF      // Watchdog Timer->Watchdog Timer is disabled
-#pragma config ICS = PGx1        // Emulator Pin Placement Select bits->Emulator functions are shared with PGEC1/PGED1
-#pragma config WINDIS = OFF      // Windowed WDT->Standard Watchdog Timer enabled,(Windowed-mode is disabled)
-#pragma config JTAGEN = OFF      // JTAG Port Enable->JTAG port is disabled
-#pragma config FWPSA = PR128     // WDT Prescaler->Prescaler ratio of 1:128
-#pragma config GWRP = OFF        // General Segment Write Protect->Writes to program memory are allowed
-
-void init(void) {
-	// CPDIV 1:1; RCDIV FRC/2; DOZE 1:8; G1CLKSEL disabled; DOZEN disabled; ROI disabled;
-	CLKDIV = 0x3100;
-	// GCLKDIV 1;
-	CLKDIV2 = 0x0000;
-
-	t6963c_init();
+//unsigned char* string = "me@pic:~$ ls
+//me@pic:~$ mkdir docs
+//me@pic:~$ cd docs/
+//me@pic:~/docs$ ls
+//me@pic:~/docs$ touch doc.txt
+//me@pic:~/docs$ ls
+//doc.txt
+//me@pic:~/docs$ cat doc.txt
+//me@pic:~/docs$ echo hello > doc.txt
+//me@pic:~/docs$ cat doc.txt
+//hello
+//me@pic:~/docs$ cd ..
+//me@pic:~$ tree -fFi
+//.
+//./docs/
+//./docs/doc.txt
+//
+//1 directory, 1 file
+//me@pic:~$ rm -r docs/
+//";
+const static char* string =
+	"[me@pic ~] ls\n"
+	"[me@pic ~] mkdir docs\n"
+	"[me@pic ~] cd docs/\n"
+	"[me@pic docs] ls\n"
+	"[me@pic docs] touch doc.txt\n"
+	"[me@pic docs] ls\n"
+	"doc.txt\n"
+	"[me@pic docs] cat doc.txt\n"
+	"[me@pic docs] echo hello > doc.txt\n"
+	"[me@pic docs] cat doc.txt\n"
+	"hello\n"
+	"[me@pic docs] cd ..\n"
+	"[me@pic ~] tree -fFi\n"
+	".\n"
+	"./docs/\n"
+	"./docs/doc.txt\n"
+	"\n"
+	"1 directory, 1 file\n"
+	"[me@pic ~] rm -r docs/\n";
+
+void init_terminal(void) {
+	term = terminal.construct(t6963c_rows * t6963c_columns);
+	term->update = t6963c_update_terminal;
+}
+
+void loop_string(void) {
+    unsigned short i, j;
+    unsigned char state = 0; // 0 = quick, 1 = slow
+    for (i = 0; string[i]; i++) {
+        if (!terminal.appendChar(term, string[i])) {
+            terminal.free(term);
+            t6963c_clear();
+            t6963c_set_address(5,5);
+            t6963c_writeString("ERROR");
+            while (1);
+        }
+        if (string[i] == ']') {
+            state = 1;
+            terminal.appendChar(term, string[++i]);
+			__delay_ms(800);
+        } else if (string[i] == '\n') {
+            state = 0;
+        }
+        if (state) {
+			__delay_ms(80);
+		}
+	}
 }
 
 int main(void) {
-	TRISBbits.TRISB0 = 0;
+	init();
+	init_terminal();
+
 	while (1) {
-		delay_ns(1000);
-		LATBbits.LATB0 = 0;
-		delay_ns(100);
-		LATBbits.LATB0 = 1;
+		loop_string();
 	}
+
 	return 0;
 }
diff --git a/firmware/t6963c_specific.c b/firmware/t6963c_specific.c
index 05b7ebf..103c1d3 100644
--- a/firmware/t6963c_specific.c
+++ b/firmware/t6963c_specific.c
@@ -24,15 +24,15 @@ inline void t6963c_initTimer(void) {
 }
 
 inline void t6963c_startTimer(void) {
-	T2CON = 0xa000; // TMR2 enabled, 16-bit mode; gated time acc. disabled
-	PR2 = 0xffff; // ???
-	TMR2 = 0x00;
+	PR2 = 0xffff; // no period
+	T2CON = 0x8000; // TMR2 enabled, 16-bit mode; gated time acc. disabled
+	TMR2 = 0x0000;
 }
 
 inline unsigned short t6963c_getTimeNs(void) {
 	return TMR2 * t6963c_nspertick;
 }
 
-inline void t6963c_stopTimer(void) { 
+inline void t6963c_stopTimer(void) {
 	T2CON = 0x0000;
 }
diff --git a/firmware/t6963c_specific.h b/firmware/t6963c_specific.h
index 4df7923..5d8d18c 100644
--- a/firmware/t6963c_specific.h
+++ b/firmware/t6963c_specific.h
@@ -17,7 +17,7 @@
  * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  *
  *******************************************************************************
- * 
+ *
  * File:   t6963c_specific.h
  * Author: Camil Staps
  *
@@ -30,27 +30,27 @@
 #include <xc.h>
 
 #define t6963c_rst(x)    LATFbits.LATF3   = (x) // RESET line
-#define t6963c_cd(x)     LATBbits.LATB6   = (x) // C/D line
-#define t6963c_ce(x)     LATBbits.LATB7   = (x) // CE line
-#define t6963c_rd(x)     LATFbits.LATF4   = (x) // RD line
-#define t6963c_wr(x)     LATFbits.LATF5   = (x) // WR line
+#define t6963c_cd(x)     LATBbits.LATB7   = (x) // C/D line
+#define t6963c_ce(x)     LATBbits.LATB6   = (x) // CE line
+#define t6963c_rd(x)     LATFbits.LATF5   = (x) // RD line
+#define t6963c_wr(x)     LATFbits.LATF4   = (x) // WR line
 #define t6963c_t_rst(x)  TRISFbits.TRISF3 = (x) // TRIS bit of RESET pin
-#define t6963c_t_cd(x)   TRISBbits.TRISB6 = (x) // TRIS bit of C/D pin
-#define t6963c_t_ce(x)   TRISBbits.TRISB7 = (x) // TRIS bit of CE pin
-#define t6963c_t_rd(x)   TRISFbits.TRISF4 = (x) // TRIS bit of RD pin
-#define t6963c_t_wr(x)   TRISFbits.TRISF5 = (x) // TRIS bit of WR pin
+#define t6963c_t_cd(x)   TRISBbits.TRISB7 = (x) // TRIS bit of C/D pin
+#define t6963c_t_ce(x)   TRISBbits.TRISB6 = (x) // TRIS bit of CE pin
+#define t6963c_t_rd(x)   TRISFbits.TRISF5 = (x) // TRIS bit of RD pin
+#define t6963c_t_wr(x)   TRISFbits.TRISF4 = (x) // TRIS bit of WR pin
 #define t6963c_data(x)   LATB  = (LATB  & 0x00ff) | (x << 8) // Data port
 #define t6963c_t_data(x) TRISB = (TRISB & 0x00ff) | (x << 8) // TRIS register of data port
-    
+
 #define t6963c_rows 16           // Number of rows of the LCD
 #define t6963c_columns 40        // Number of columns of the LCD
 
-#ifdef	__cplusplus
+#ifdef __cplusplus
 extern "C" {
 #endif
 
-#define t6963c_nspertick 4000
-    
+#define t6963c_nspertick 64
+
 /**
  * Define the project-specific timer functions here
  * @see t6963c.h
@@ -60,9 +60,8 @@ inline void t6963c_startTimer(void);
 inline unsigned short t6963c_getTimeNs(void);
 inline void t6963c_stopTimer(void);
 
-#ifdef	__cplusplus
+#ifdef __cplusplus
 }
 #endif
 
-#endif	/* T6963C_SPECIFIC_H */
-
+#endif /* T6963C_SPECIFIC_H */