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@@ -52,7 +52,7 @@ ARM instructions have 4-bit register fields to address them.
Some 16-bit Thumb instructions have 3-bit register fields that can only address the lowest eight registers.
For these instructions there exist 32-bit variants that can address all sixteen registers.
-\begin{figure*}[t]
+\begin{figure*}[b]
\centering
\begin{subfigure}[b]{.2\linewidth}
\centering
@@ -312,6 +312,9 @@ There was a minor problem with negative offsets to the \ual{ldr} instruction,
that cannot be as large in Thumb as they can in ARM.
\Cref{sec:load-offsets} deals with this.
+Moving to Thumb introduces a number of interesting optimisation vectors.
+One of them, register allocation, is discussed in \cref{sec:reg-alloc}.
+
We benchmark the Thumb backend for Clean and discuss the results in \cref{sec:results}.
\subsection{Terminology}