diff options
| author | Camil Staps | 2016-12-25 01:54:15 +0100 |
|---|---|---|
| committer | Camil Staps | 2016-12-25 02:10:43 +0100 |
| commit | c38601f0b0fa8f2d64701ac92b1186a1293bf6c3 (patch) | |
| tree | cda9ef7f1ed151e9808e4dbac79fb34a7e95508b /thesis/intro.tex | |
| parent | Foreign function interface and register allocation optimisation (diff) | |
Current status; small fixes; more optimisation ideas in log
Diffstat (limited to 'thesis/intro.tex')
| -rw-r--r-- | thesis/intro.tex | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/thesis/intro.tex b/thesis/intro.tex index 12a1484..f92b21d 100644 --- a/thesis/intro.tex +++ b/thesis/intro.tex @@ -52,7 +52,7 @@ ARM instructions have 4-bit register fields to address them. Some 16-bit Thumb instructions have 3-bit register fields that can only address the lowest eight registers. For these instructions there exist 32-bit variants that can address all sixteen registers. -\begin{figure*}[t] +\begin{figure*}[b] \centering \begin{subfigure}[b]{.2\linewidth} \centering @@ -312,6 +312,9 @@ There was a minor problem with negative offsets to the \ual{ldr} instruction, that cannot be as large in Thumb as they can in ARM. \Cref{sec:load-offsets} deals with this. +Moving to Thumb introduces a number of interesting optimisation vectors. +One of them, register allocation, is discussed in \cref{sec:reg-alloc}. + We benchmark the Thumb backend for Clean and discuss the results in \cref{sec:results}. \subsection{Terminology} |