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| author | Camil Staps | 2017-07-19 12:59:53 +0000 |
|---|---|---|
| committer | Camil Staps | 2017-07-19 12:59:53 +0000 |
| commit | a8534a038f3c9588243ff5ab940e974f10f66a19 (patch) | |
| tree | d3948c3b7c008f4dd03c4f98070761ad14a2e9a8 /Sil/Syntax.icl | |
| parent | Add while and !, fix error in consecutive declarations (diff) | |
Add while and ! to printer
Diffstat (limited to 'Sil/Syntax.icl')
| -rw-r--r-- | Sil/Syntax.icl | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/Sil/Syntax.icl b/Sil/Syntax.icl index c812508..0056618 100644 --- a/Sil/Syntax.icl +++ b/Sil/Syntax.icl @@ -37,6 +37,7 @@ where instance toString Op1 where toString Neg = "~" + toString Not = "!" instance toString Op2 where |