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authorCamil Staps2016-02-02 19:24:50 +0100
committerCamil Staps2016-02-02 19:24:50 +0100
commita7d7542dc646a5fd124ef71e71ce260889f1701b (patch)
tree04ed89503bbb3cc9933273a1326a53ca724c3492 /fp2/week3/mart/StdDynSet.dcl
parentweek6 camil: working positioning of lines by putting empties at left and righ... (diff)
Moved to 1415 directoryHEADmaster
Diffstat (limited to 'fp2/week3/mart/StdDynSet.dcl')
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diff --git a/fp2/week3/mart/StdDynSet.dcl b/fp2/week3/mart/StdDynSet.dcl
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-definition module StdDynSet
-
-import StdOverloaded
-
-class Set a | TC, ==, toString a
-
-:: Set
-
-instance zero Set
-instance toString Set
-instance == Set
-
-toSet :: a -> Set | Set a
-
-nrOfElts :: Set -> Int
-isEmptySet :: Set -> Bool
-
-memberOfSet :: a Set -> Bool | Set a
-isSubset :: Set Set -> Bool
-isStrictSubset :: Set Set -> Bool
-
-union :: Set Set -> Set
-intersection :: Set Set -> Set
-without :: Set Set -> Set