diff options
Diffstat (limited to 'thesis')
| -rw-r--r-- | thesis/code-addresses.tex (renamed from thesis/two-bits.tex) | 12 | ||||
| -rw-r--r-- | thesis/intro.tex | 6 | ||||
| -rw-r--r-- | thesis/thesis.tex | 2 |
3 files changed, 10 insertions, 10 deletions
diff --git a/thesis/two-bits.tex b/thesis/code-addresses.tex index ac8419b..2c3a043 100644 --- a/thesis/two-bits.tex +++ b/thesis/code-addresses.tex @@ -1,10 +1,10 @@ \section{Code addresses} -\label{sec:two-bits} +\label{sec:code-addresses} \begin{multicols}{2} \subsection{Introduction} -\label{sec:two-bits:intro} +\label{sec:code-addresses:intro} The ARM ISA only has 32-bit instructions, meaning that the two least significant bits of a code address are always zero. When a branch is attempted to an address which has one or both of these bits set, the processor will automatically align the address by clearing these bits. @@ -16,7 +16,7 @@ When the PC is written to with a value where the LSB is cleared, When the LSB is set, it switches to Thumb mode~\parencite[A2.3.2]{armv7ar}. \subsection{Usage in Clean} -\label{sec:two-bits:clean} +\label{sec:code-addresses:clean} The fact that in ARM mode the two lowest bits of a value written to the PC are cleared automatically has been exploited in the ARM code generator: these two bits are used to store information. Bit 1 is used to mark a node as having reached head normal form% @@ -27,7 +27,7 @@ Bit 0 is used in Clean's default garbage collector, the copying collector, to re Porting to Thumb, we need to find a way to store this information without jumping to the middle of an instruction or accidentally switching to ARM mode. \subsection{Solution} -\label{sec:two-bits:solution} +\label{sec:code-addresses:solution} The solution for bit 1 is straightforward. By aligning all code addresses that we will ever want to jump to (the node entry addresses) on words rather than half-words, we ensure that bit 1 is always cleared. When a node has reached head normal form, setting bit 1 will give a corrupt address. @@ -43,7 +43,7 @@ This only introduces problems in the copying collector, Flipping the meaning of the LSB in the copying collector fixes this issue. \subsection{Comparison} -\label{sec:two-bits:comparison} +\label{sec:code-addresses:comparison} Flipping the meaning of the LSB in the garbage collector amounts to swapping \ual{bne} and \ual{beq} and similar changes that do not effect the program's efficiency or size. By word-aligning all node entry addresses we lose one alignment byte per node entry address on average @@ -52,7 +52,7 @@ This increases code size slightly, but since many instructions that were 32-bit Aligning node entries has no effect on the program's efficiency, since the \ual{nop} instruction that is inserted above it will never be executed. \subsection{Other solutions} -\label{sec:two-bits:other-solutions} +\label{sec:code-addresses:other-solutions} The solution described above exploits the fact that the LSB of a code address is only used inside the garbage collector, and has a fixed value everywhere else. The solution for bit 1, however, is not specific to the Clean RTS. diff --git a/thesis/intro.tex b/thesis/intro.tex index 85f13b8..1056d9f 100644 --- a/thesis/intro.tex +++ b/thesis/intro.tex @@ -106,7 +106,7 @@ The ARM and Thumb instruction sets are designed to \emph{interwork}: The Thumb-2 code generator proposed in this thesis does not produce ARM code, though the existence of the interworking facility has effects on the techniques that can be used in it. -This will be covered in \cref{sec:two-bits}. +This will be covered in \cref{sec:code-addresses}. \subsection{Clean} \label{sec:intro:clean} @@ -292,7 +292,7 @@ Second, we doubt that using interworking can be done efficiently. In the run-time system, only minimal time overhead is introduced by using Thumb instructions. For generated code it would be complicated to detect if the ARM or Thumb instruction set would give better results, and this would give significantly better results only in specific cases. -Third, the problem discussed in \cref{sec:two-bits} could be solved efficiently only without interworking. +Third, the problem discussed in \cref{sec:code-addresses} could be solved efficiently only without interworking. Using interworking would introduce overhead at every branch instruction, since the solution to this problem would have to be adapted. @@ -311,7 +311,7 @@ In much of the rest of this thesis we discuss differences between ARM and Thumb, their influences on code generation, and the way they were dealt with in the Thumb backend for Clean proposed in this thesis. In \cref{sec:storing-pc}, we consider an issue arising from halfword-aligned instructions and the way a read of PC is interpreted under Thumb. -\Cref{sec:two-bits} discusses problems related to the fact that Thumb instruction addresses use bit 1 and should have bit 0 set for interworking, +\Cref{sec:code-addresses} discusses problems related to the fact that Thumb instruction addresses use bit 1 and should have bit 0 set for interworking, while under ARM a branch will automatically clear both these bits. The Thumb backend for Clean has been benchmarked. diff --git a/thesis/thesis.tex b/thesis/thesis.tex index 8760159..9bcd318 100644 --- a/thesis/thesis.tex +++ b/thesis/thesis.tex @@ -48,7 +48,7 @@ Specifically, we look at code generation for the purely functional programming l \input{intro} \input{storing-pc} -\input{two-bits} +\input{code-addresses} \input{results} \ifdraft\else |