Expand register allocation section; minor changes

1 files changed, 8 insertions, 3 deletions

diff --git a/thesis/storing-pc.tex b/thesis/storing-pc.tex
index 40da1d1..bfb8442 100644
--- a/thesis/storing-pc.tex
+++ b/thesis/storing-pc.tex
@@ -121,13 +121,18 @@ We then get, for the example from \texttt{armstartup.s:540-2}:
 We store the value \ual{0x2d}.
 This address points to the \ual{tst} instruction as before, with the LSB set to 1 to indicate Thumb mode.
 
-In assembly code, we can solve this by adding labels for the addresses we want to store on the stack.
-In object code, we need to keep track of the current alignment and add either 9 or 11 to the read program counter.
-
 The offset, 9, is calculated as the number of bytes to the instruction after the branch plus one for Thumb mode.
 For \ual{b} and \ual{bl} instructions, this means an offset of 9, since these instructions are 32-bit.
 The \ual{bx} and \ual{blx} instructions are 16-bit, and require an offset of 7.
 
+The second problem is that
+	when the \ual{add} instruction is located at the start of a halfword (e.g. \ual{0x22}),
+	the value that is read for PC will still be \ual{0x20}, as it is word-aligned~\parencite[A5.1.2]{armv7m}
+When generating object code, we need to keep track of the current alignment and add either 7, 9 or 11 to the read program counter,
+	depending on both the alignment and the size of the branch instruction.
+When generating assembly code, we are less concerned with efficiency.
+In this code generator, we simply force-align the \ual{add} instruction (by adding an \ual{.align} directive, which will insert a \ual{nop} if necessary).
+
 \subsection{Implementation details}
 \label{sec:storing-pc:implementation}
 A jump always jumps to either a label (with \ual{b} or \ual{bl}) or a register (with \ual{bx} or \ual{blx}).