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1 files changed, 21 insertions, 0 deletions

diff --git a/log.md b/log.md
index a1d957e..2a65199 100644
--- a/log.md
+++ b/log.md
@@ -580,3 +580,24 @@ And then there was a **problem** in `backend/backend`, where the instruction
 `add sp,r8,#4` is generated. This is not allowed due to special treatment of
 `sp` (A5.1.3 of ARMv7-M). The **solution** is to store the result temporarily
 in the scratch register (cg `7c22910`).
+
+Now there is an **issue** with long jumps; see
+http://stackoverflow.com/q/40916440/1544337. In the cocl, branches to
+`selector__m__error` (in the RTS) are too long and cannot be conditional.
+Ideally, we would just rewrite these bits from
+
+```armasm
+	cmp	r12,r14
+	bne	selector_m_error
+```
+
+to
+
+```armasm
+	cmp r12,r14
+	beq	a_bit_further
+	b	selector_m_error
+a_bit_further:
+```
+
+Should check with John.