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| author | Camil Staps | 2017-07-28 11:05:15 +0200 |
|---|---|---|
| committer | Camil Staps | 2017-07-28 11:05:15 +0200 |
| commit | a69b85acbf5f81a1a684156e152e68aa2ae40e99 (patch) | |
| tree | 8db2fc3c6a656a546298ac397d1b6465f7a9b635 /Sil | |
| parent | Use buildh instead of fillh (diff) | |
Optimise: remove unreachacble ABC-code
Diffstat (limited to 'Sil')
| -rw-r--r-- | Sil/Compile.icl | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/Sil/Compile.icl b/Sil/Compile.icl index 81196bf..e342a66 100644 --- a/Sil/Compile.icl +++ b/Sil/Compile.icl @@ -47,6 +47,8 @@ where opt ['ABC'.PushI i:'ABC'.Update_b 0 l:'ABC'.Pop_b n:ss] | l == n = ['ABC'.Pop_b n:'ABC'.PushI i:opt ss] opt ['ABC'.Pop_a i:'ABC'.Pop_a j:ss] = opt ['ABC'.Pop_a (i+j):ss] opt ['ABC'.Pop_b i:'ABC'.Pop_b j:ss] = opt ['ABC'.Pop_b (i+j):ss] + opt ['ABC'.Rtn:ss] = ['ABC'.Rtn:opt $ skipUntilEntryPoint ss] + opt ['ABC'.Jmp l:ss] = ['ABC'.Jmp l:opt $ skipUntilEntryPoint ss] opt [s:ss] = [s:opt ss] opt [] = [] @@ -58,6 +60,14 @@ where isUseful ('ABC'.Comment _) = False isUseful _ = True + skipUntilEntryPoint :: 'ABC'.Assembler -> 'ABC'.Assembler + skipUntilEntryPoint ss + | all (\t -> t =: ('ABC'.Annotation _)) before = ss + | otherwise = skipUntilEntryPoint $ tl ss + where + (before,after) = span (not o (\t -> t =: ('ABC'.Label _))) ss + skipUntilEntryPoint [] = [] + :: Address = AAddr Int | BAddr Int |