summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
Diffstat
-rw-r--r--cgcalc.c8
-rw-r--r--cgcode.c4
-rw-r--r--cgcodep.h2
-rw-r--r--cgconst.h5
-rw-r--r--cgiconst.h5
-rw-r--r--cginput.c2
-rw-r--r--cglin.c2
-rw-r--r--cgopt.c15
-rw-r--r--cgpas.c14
-rw-r--r--cgpwas.c16
10 files changed, 56 insertions, 17 deletions
diff --git a/cgcalc.c b/cgcalc.c
index c0c75b2..7c14d0c 100644
--- a/cgcalc.c
+++ b/cgcalc.c
@@ -2275,7 +2275,7 @@ void calculate_graph_register_uses (INSTRUCTION_GRAPH graph)
calculate_dyadic_non_commutative_operator (graph);
return;
case GDIV:
-#ifdef I486
+#if defined (I486) || defined (G_POWER)
case GDIVU:
#endif
calculate_dyadic_non_commutative_data_operator (graph);
@@ -2485,7 +2485,7 @@ void count_graph (INSTRUCTION_GRAPH graph)
case GCMP_LT:
case GCMP_LTU:
case GDIV:
-#ifdef I486
+#if defined (I486) || defined (G_POWER)
case GDIVU:
#endif
case GFADD:
@@ -2650,7 +2650,7 @@ void mark_graph_2 (register INSTRUCTION_GRAPH graph)
case GCMP_LT:
case GCMP_LTU:
case GDIV:
-#ifdef I486
+#if defined (I486) || defined (G_POWER)
case GDIVU:
#endif
case GFADD:
@@ -2830,7 +2830,7 @@ void mark_graph_1 (register INSTRUCTION_GRAPH graph)
case GCMP_LT:
case GCMP_LTU:
case GDIV:
-#ifdef I486
+#if defined (I486) || defined (G_POWER)
case GDIVU:
#endif
case GFADD:
diff --git a/cgcode.c b/cgcode.c
index 60565cb..f7fae7a 100644
--- a/cgcode.c
+++ b/cgcode.c
@@ -199,7 +199,7 @@ int no_time_profiling;
#endif
#define g_cnot(g1) g_instruction_1(GCNOT,(g1))
#define g_div(g1,g2) g_instruction_2(GDIV,(g1),(g2))
-#ifdef I486
+#if defined (I486) || defined (G_POWER)
# define g_divu(g1,g2) g_instruction_2(GDIVU,(g1),(g2))
#endif
#define g_eor(g1,g2) g_instruction_2(GEOR,(g1),(g2))
@@ -1828,7 +1828,7 @@ void code_divR (VOID)
#endif
}
-#ifdef I486
+#if defined (I486) || defined (G_POWER)
void code_divU (VOID)
{
INSTRUCTION_GRAPH graph_1,graph_2,graph_3;
diff --git a/cgcodep.h b/cgcodep.h
index 4929abe..7ba6489 100644
--- a/cgcodep.h
+++ b/cgcodep.h
@@ -63,7 +63,7 @@ void code_decI (VOID);
void code_del_args (int source_offset,int n_arguments,int destination_offset);
void code_divI (VOID);
void code_divR (VOID);
-#ifdef I486
+#if defined (I486) || defined (G_POWER)
void code_divU (VOID);
#endif
void code_entierR (VOID);
diff --git a/cgconst.h b/cgconst.h
index 60e8c6c..882fcc7 100644
--- a/cgconst.h
+++ b/cgconst.h
@@ -21,8 +21,11 @@ enum {
#ifdef G_POWER
,GCREATE_S, GUMULH
#endif
+#if defined (I486) || defined (G_POWER)
+ ,GDIVU
+#endif
#ifdef I486
- ,GDIVU, GREMU
+ ,GREMU
#endif
};
diff --git a/cgiconst.h b/cgiconst.h
index 90ddb80..95f9315 100644
--- a/cgiconst.h
+++ b/cgiconst.h
@@ -55,7 +55,10 @@ enum {
,IFEXG
#endif
#if defined (I486)
- ,IRTSI, IDIVI, IREMI, IDIVU, IREMU
+ ,IRTSI, IDIVI, IREMI, IREMU
+#endif
+#if defined (I486) || defined (G_POWER)
+ ,IDIVU
#endif
#ifdef G_POWER
,IUMULH
diff --git a/cginput.c b/cginput.c
index dc5558e..4e0b77f 100644
--- a/cginput.c
+++ b/cginput.c
@@ -1762,7 +1762,7 @@ static void put_instructions_in_table (void)
put_instruction_name ("del_args", parse_instruction_n_n_n, code_del_args );
put_instruction_name ("divI", parse_instruction, code_divI );
put_instruction_name ("divR", parse_instruction, code_divR );
-#ifdef I486
+#if defined (I486) || defined (G_POWER)
put_instruction_name ("divU", parse_instruction, code_divU );
#endif
put_instruction_name ("entierR", parse_instruction, code_entierR );
diff --git a/cglin.c b/cglin.c
index 2ebea11..0afc369 100644
--- a/cglin.c
+++ b/cglin.c
@@ -7679,10 +7679,10 @@ static void linearize_graph (INSTRUCTION_GRAPH graph,ADDRESS *ad_p)
case GMOD:
linearize_div_rem_operator (IMOD,graph,ad_p);
return;
-# ifdef I486
case GDIVU:
linearize_div_rem_operator (IDIVU,graph,ad_p);
return;
+# ifdef I486
case GREMU:
linearize_div_rem_operator (IREMU,graph,ad_p);
return;
diff --git a/cgopt.c b/cgopt.c
index 5ef71ce..1753f65 100644
--- a/cgopt.c
+++ b/cgopt.c
@@ -415,7 +415,10 @@ static int get_argument_size (int instruction_code)
IF_G_RISC (case IADDI: case ILSLI:)
IF_G_SPARC (case IADDO: case ISUBO: )
#ifdef I486
- case IDIVI: case IREMI: case IDIVU: case IREMU:
+ case IDIVI: case IREMI: case IREMU:
+#endif
+#if (defined (I486) && !defined (I486_USE_SCRATCH_REGISTER)) || defined (G_POWER)
+ case IDIVU:
#endif
IF_G_POWER ( case IUMULH: )
return 4;
@@ -1511,11 +1514,11 @@ static void store_next_uses (struct instruction *instruction)
#ifndef I486_USE_SCRATCH_REGISTER
case IASR: case ILSL: case ILSR:
case IDIV:
-# ifdef I486
- case IDIVU:
-# endif
case ICMPW:
#endif
+#if (defined (I486) && !defined (I486_USE_SCRATCH_REGISTER)) || defined (G_POWER)
+ case IDIVU:
+#endif
case IEOR: case IFADD:
case IFCMP: case IFDIV: case IFMUL: case IFREM: case IFSUB:
case IMUL: case IOR: case ISUB: case ICMP:
@@ -3797,9 +3800,9 @@ static void allocate_registers (struct basic_block *basic_block)
#ifndef I486_USE_SCRATCH_REGISTER
case IASR: case ILSL: case ILSR:
case IDIV:
-# ifdef I486
+#endif
+#if (defined (I486) && !defined (I486_USE_SCRATCH_REGISTER)) || defined (G_POWER)
case IDIVU:
-# endif
#endif
case IEOR:
case IFADD: case IFCMP: case IFDIV: case IFMUL: case IFREM: case IFSUB:
diff --git a/cgpas.c b/cgpas.c
index b93d84c..3cfa3e0 100644
--- a/cgpas.c
+++ b/cgpas.c
@@ -509,6 +509,7 @@ static unsigned char real_reg_num [32] =
#define as_cmpi(ra,si) store_instruction ((11<<26)|(reg_num(ra)<<16)|((UWORD)(si)))
#define as_cmpl(ra,rb) store_instruction ((31<<26)|(reg_num(ra)<<16)|(reg_num(rb)<<11)|(32<<1))
#define as_divw(rd,ra,rb) as_i_dab (rd,ra,rb,491)
+#define as_divwu(rd,ra,rb) as_i_dab (rd,ra,rb,459)
#define as_bc(i) store_instruction ((16<<26)|(i))
#define as_bcl(i) store_instruction ((16<<26)|1|(i))
#ifdef USE_DCBZ
@@ -1418,6 +1419,16 @@ static void as_div_instruction (struct instruction *instruction)
instruction->instruction_parameters[1].parameter_data.reg.r,reg);
}
+static void as_divu_instruction (struct instruction *instruction)
+{
+ int reg;
+
+ reg=as_register_parameter (instruction->instruction_parameters[0],SIZE_LONG);
+
+ as_divwu (instruction->instruction_parameters[1].parameter_data.reg.r,
+ instruction->instruction_parameters[1].parameter_data.reg.r,reg);
+}
+
static void as_rem_instruction (struct instruction *instruction)
{
int reg;
@@ -2773,6 +2784,9 @@ static void write_instructions (struct instruction *instructions)
case IDIV:
as_div_instruction (instruction);
break;
+ case IDIVU:
+ as_divu_instruction (instruction);
+ break;
case IMOD:
as_rem_instruction (instruction);
break;
diff --git a/cgpwas.c b/cgpwas.c
index ba20c7a..918fd77 100644
--- a/cgpwas.c
+++ b/cgpwas.c
@@ -2252,6 +2252,19 @@ static void w_as_div_instruction (struct instruction *instruction)
w_as_register_newline (reg);
}
+static void w_as_divu_instruction (struct instruction *instruction)
+{
+ int reg;
+
+ reg=w_as_register_parameter (instruction->instruction_parameters[0],SIZE_LONG);
+
+ w_as_opcode ("divwu");
+
+ w_as_register_comma (instruction->instruction_parameters[1].parameter_data.reg.r);
+ w_as_register_comma (instruction->instruction_parameters[1].parameter_data.reg.r);
+ w_as_register_newline (reg);
+}
+
static void w_as_mul_instruction (struct instruction *instruction)
{
int r,reg;
@@ -3092,6 +3105,9 @@ static void w_as_instructions (register struct instruction *instruction)
case IDIV:
w_as_div_instruction (instruction);
break;
+ case IDIVU:
+ w_as_divu_instruction (instruction);
+ break;
case IMOD:
w_as_rem_instruction (instruction);
break;
generated by cgit v1.2.3 (git 2.39.1) at 2025-03-14 06:47:31 +0000