Made ARMv8 IT corrections optional

1 files changed, 17 insertions, 1 deletions

diff --git a/cgthumb2was.c b/cgthumb2was.c
index d894e7a..49021bc 100644
--- a/cgthumb2was.c
+++ b/cgthumb2was.c
@@ -460,7 +460,17 @@ void w_as_abc_string_and_label_in_data_section (char *string,int length,char *la
 		w_as_newline();
 }
 
-static char *register_name[15]={"sp","r10","r9","r11","r8","r7","r6","r4","r3","r2","r1","r0","r5","r12","r14"};
+// Optimised
+//static char *register_name[15]={"sp","r1","r5","r12","r8","r7","r6","r4","r3","r2","r11","r10","r9","r0","r14"};
+//static int register_order[15]={13,1,5,12,8,7,6,4,3,2,11,10,9,0,14};
+
+// Tryout
+static char *register_name[15]={"sp","r10","r5","r12","r8","r7","r6","r4","r3","r2","r1","r11","r9","r0","r14"};
+static int register_order[15]={13,10,5,12,8,7,6,4,3,2,1,11,9,0,14};
+
+// Original
+//static char *register_name[15]={"sp","r10","r9","r11","r8","r7","r6","r4","r3","r2","r1","r0","r5","r12","r14"};
+//static int register_order[15]={13,10,9,11,8,7,6,4,3,2,1,0,5,12,14};
 
 #define REGISTER_FREE_HEAP 5
 #define REGISTER_S0 6
@@ -1710,7 +1720,11 @@ static void w_as_set_condition_instruction (struct instruction *instruction,char
 	r=instruction->instruction_parameters[0].parameter_data.reg.r;
 
 	if (condition) {
+#ifdef ARMV8
 		w_as_opcode ("it");
+#else
+		w_as_opcode ("ite");
+#endif
 		fputs (condition,assembly_file);
 		w_as_newline_after_instruction();
 	}
@@ -1720,11 +1734,13 @@ static void w_as_set_condition_instruction (struct instruction *instruction,char
 	fprintf (assembly_file,",#1");
 	w_as_newline_after_instruction();
 
+#ifdef ARMV8
 	if (condition) {
 		w_as_opcode ("it");
 		fputs (invert_condition(condition),assembly_file);
 		w_as_newline_after_instruction();
 	}
+#endif
 
 	w_as_opcode_condition (opcode,invert_condition(condition),0);
 	w_as_register (r);