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-rw-r--r--assignment-13/uFPL/C.dcl5
-rw-r--r--assignment-13/uFPL/C.icl14
-rw-r--r--assignment-13/uFPL/Sim.dcl2
-rw-r--r--assignment-13/uFPL/Sim.icl17
4 files changed, 24 insertions, 14 deletions
diff --git a/assignment-13/uFPL/C.dcl b/assignment-13/uFPL/C.dcl
index f9d3595..3b25183 100644
--- a/assignment-13/uFPL/C.dcl
+++ b/assignment-13/uFPL/C.dcl
@@ -33,14 +33,14 @@ from uFPL.Util import class print
:: CBody
= CBReturn (Maybe CExpr)
- | CBIf CExpr CBody CBody
+ | CBIf CExpr CBody [(CExpr, CBody)] (Maybe CBody)
| CBWhile CExpr CBody
| CBAssign String CExpr
| CBSeq CBody CBody
| CBEmpty
| CBExpr CExpr
-(`seq`) infix 0 :: CBody CBody -> CBody
+(`seq`) infixr 0 :: CBody CBody -> CBody
:: CVar =
{ name :: String
@@ -51,7 +51,6 @@ from uFPL.Util import class print
:: CFun =
{ params :: [(Int, CType)]
, body :: CBody
- , fresh :: Int
, type :: CType
, name :: String
}
diff --git a/assignment-13/uFPL/C.icl b/assignment-13/uFPL/C.icl
index 763774c..87f8573 100644
--- a/assignment-13/uFPL/C.icl
+++ b/assignment-13/uFPL/C.icl
@@ -15,7 +15,7 @@ import Data.Tuple
import uFPL.Arduino
import uFPL.Util
-(`seq`) infix 0 :: CBody CBody -> CBody
+(`seq`) infixr 0 :: CBody CBody -> CBody
(`seq`) CBEmpty cb = cb
(`seq`) cb CBEmpty = cb
(`seq`) a b = CBSeq a b
@@ -68,10 +68,14 @@ instance print CBody
where
print (CBReturn Nothing) = print "return;"
print (CBReturn (Just e)) = print "return " o print e o print ";"
- print (CBIf c t e) = print "if (" o print c o print ") {" o indent o nl
- o print t o unindent o nl
- o print "} else {" o indent o nl
- o print e o unindent o nl o print "}"
+ print (CBIf c t eifs e) =
+ prsperse "} else " [print "if (" o print c o print ") {" o indent o nl o print t o unindent o nl \\ (c,t) <- [(c,t):eifs]]
+ o case e of
+ Just e ->
+ print "} else {" o indent o nl
+ o print e o unindent o nl o print "}"
+ Nothing ->
+ print "}"
print (CBWhile e b) = print "while (" o print e o print ") {" o nl o print b o nl o print "}"
print (CBAssign v e) = print v o print " = " o print e o print ";"
print (CBSeq a b) = print a o nl o print b
diff --git a/assignment-13/uFPL/Sim.dcl b/assignment-13/uFPL/Sim.dcl
index b4d8528..96527db 100644
--- a/assignment-13/uFPL/Sim.dcl
+++ b/assignment-13/uFPL/Sim.dcl
@@ -69,4 +69,4 @@ instance toString UFPLException
, display :: Display
}
-simulate :: [NamedRule] -> *World -> *World
+simulate :: (String, [NamedRule]) -> *World -> *World
diff --git a/assignment-13/uFPL/Sim.icl b/assignment-13/uFPL/Sim.icl
index 5fccd8e..892708c 100644
--- a/assignment-13/uFPL/Sim.icl
+++ b/assignment-13/uFPL/Sim.icl
@@ -1,5 +1,6 @@
implementation module uFPL.Sim
+import StdFile
from StdFunc import flip, seq
from Data.Func import $
@@ -8,6 +9,7 @@ from Data.List import concatMap
import qualified Data.Map as M
import Data.Maybe
import Data.Tuple
+import System.File
from Text import <+
import Text.HTML
@@ -289,8 +291,8 @@ where
, display = st.State.display
}
-simulate :: [NamedRule] -> *World -> *World
-simulate rs = startEngine $
+simulate :: (String, [NamedRule]) -> *World -> *World
+simulate (progName, rs) = startEngine $
(setupShares >>| sim)
-&&- ((
whileUnchanged (irules >*< ishares) (uncurry newShares)
@@ -369,9 +371,14 @@ where
millisActions shrs ++
[ action "Step" $ step
, OnAction (Action "Generate code") $ ifOk $ get irules >>= lift >>= \rs -> case rs of
- (rs :: [NamedRule]) -> viewInformation (Title "Generated code")
- [ViewUsing id (textArea <<@ sizeAttr (ExactSize 500) (ExactSize 600) <<@ styleAttr "font-size:11px;")]
- (printToString (genp rs)) >>| check
+ (rs :: [NamedRule]) -> let prog = printToString (genp rs) in
+ viewInformation (Title "Generated code")
+ [ViewUsing id (textArea <<@ sizeAttr (ExactSize 500) (ExactSize 600) <<@ styleAttr "font-size:11px;")]
+ prog >>*
+ [ OnAction ActionContinue $ always check
+ , OnAction ActionSaveAs $ always $ updateInformation (Title "Filename") [] (progName +++ ".ino") >>= \fn ->
+ appWorld (snd o writeFile fn prog) >>| check
+ ]
])
<<@ ApplyLayout (sequenceLayouts
finalizeStep