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Diffstat (limited to 'thesis/fix-storing-pc.tex')
| -rw-r--r-- | thesis/fix-storing-pc.tex | 29 |
1 files changed, 17 insertions, 12 deletions
diff --git a/thesis/fix-storing-pc.tex b/thesis/fix-storing-pc.tex index fbc5853..31381f0 100644 --- a/thesis/fix-storing-pc.tex +++ b/thesis/fix-storing-pc.tex @@ -1,9 +1,12 @@ -\subsection{Storing the program counter} +\section{Storing the program counter} \label{sec:fix-storing-pc} + +\begin{multicols}{2} + The first issue I ran into is that of storing the program counter. Storing the program counter on the stack is something done commonly in many languages during a function call. -\subsubsection{ARM code example} +\subsection{ARM code example} Usually, an offset to the actual program counter at the moment of the store instruction is stored, to allow for a branch after that instruction, and have the callee return to the address after that branch. The ARM architecture accommodates for this: an instruction that reads the program counter, actually reads @@ -11,9 +14,9 @@ The ARM architecture accommodates for this: an instruction that reads the progra The following ARM assembly example illustrates this (\texttt{armstartup.s:540-2},~\cite{armrts}): \begin{minted}{ual} - str pc,[sp,#-4]! @ 0x20 Store PC on the stack - bl init_clean @ 0x24 Branch to init_clean - tst r4,r4 @ 0x28 + str pc,[sp,#-4]! + bl init_clean + tst r4,r4 \end{minted} \begin{lrbox}{\ualbox} @@ -31,7 +34,7 @@ The processor branches to \ual{init_clean}, The program counter is then \ual{0x28}. For the next instruction cycle, the \ual{tst} command is executed. -\subsubsection{Adapting for Thumb-2} +\subsection{Adapting for Thumb-2} There are two reasons why the above cannot be used in Thumb-2 code. First, \ual{pc} is not allowed as the first operand to a \ual{str} instruction. @@ -39,10 +42,10 @@ Hence, we need to first move \ual{pc} to an auxiliary register, and then push th We then get: \begin{minted}{ual} - add lr,pc,#9 @ 0x20 Save PC+4+9 to LR - str lr,[sp,#-4]! @ 0x24 Store LR on the stack - bl init_clean @ 0x28 Branch to init_clean - tst r4,r4 @ 0x2c + add lr,pc,#9 + str lr,[sp,#-4]! + bl init_clean + tst r4,r4 \end{minted} We store the value \ual{0x2d}. @@ -63,7 +66,7 @@ However, in this case \ual{bl} is located at \ual{0x2a}, and since this is a 32 In hand-written code, we can solve this by adding labels for the addresses we want to store on the stack. In generated code, we need to keep track of the current alignment and add either 9 or 11 to the read program counter. -\subsubsection{Other solutions} +\subsection{Other solutions} Another solution than the one we present here is the use of the link register. Branch instructions as \ual{bl} store the address of the next instruction in the link register. We could therefore imagine a setup where the callee gets the return address from that register rather than from the stack. @@ -75,8 +78,10 @@ It is an easier solution to have the caller responsible for storing the return a which is why this approach is taken in Clean's ARM code generator\cite{armcg} and why I continue along those lines. -\subsubsection{Complexity analysis} +\subsection{Complexity analysis} To be done. %TODO For every occurrence: +1 word code size; for every function call: +1 instruction. + +\end{multicols} |