@ B stack registers:     r4 r3 r2 r1 r0
@ A stack registers:     r6 r7 r8 r11 (fp)
@ n free heap words:     r5
@ A stack pointer:       r9 (sb)
@ heap pointer:          r10 (sl)
@ scratch register:      r12 (ip)
@ B stack pointer:       r13 (sp)
@ link/scratch register: r14 (lr)

.if 0

@ ARM allocation
BSTACK_0 .req r4
BSTACK_1 .req r3
BSTACK_2 .req r2
BSTACK_3 .req r1
BSTACK_4 .req r0
BSTACK_PTR .req r13

ASTACK_0 .req r6
ASTACK_1 .req r7
ASTACK_2 .req r8
ASTACK_3 .req r11
ASTACK_PTR .req r9

HEAP_FREE .req r5
HEAP_PTR .req r10

SCRATCH_REG .req r12
LINK_REG .req r14

.else

@ Thumb-2 optimised allocation
BSTACK_0 .req r4
BSTACK_1 .req r3
BSTACK_2 .req r8
BSTACK_3 .req r11
BSTACK_4 .req r10
BSTACK_PTR .req r13

ASTACK_0 .req r6
ASTACK_1 .req r7
ASTACK_2 .req r2
ASTACK_3 .req r12
ASTACK_PTR .req r5

HEAP_FREE .req r9
HEAP_PTR .req r1

SCRATCH_REG .req r0
LINK_REG .req r14

.macro store_bstack_and_lr
	push	{r2,r3,r4,r10,r11,lr}
.endm
.macro load_bstack_and_pc
	pop	{r2,r3,r4,r10,r11,pc}
.endm

.macro store_global_registers
	push	{HEAP_PTR}
.endm
.macro load_global_registers
	pop	{HEAP_PTR}
.endm

.endif