.arch armv7-a .syntax unified .thumb .fpu vfpv3-d16 .text .globl divide .thumb_func .align divide: eor r12,r3,r4 cmp r4,#0 it lt neglt r4,r4 cmp r3,#0 it lt neglt r3,r3 cmp r4,#32 bls divide_by_small_number clz r1,r4 clz r2,r3 rsb r1,r1,#31-5-11 add r1,r1,r2 mov r2,#0 cmp r1,#32-5-11 bhs divide_large_result add r1,r1,r1,lsl #1 .align @ alignment is right now, try to not make this a nop add r14,pc,#6 add r14,r14,r1,lsl #2 mov pc,r14 .set shift,32-5-11 .rept 32-5-11 .set shift,shift-1 subs r1,r3,r4,lsl #shift itt cs movcs r3,r1 orrcs r2,r2,#1<