.include "thumb2regs.s"

	.arch	armv7-a
	.syntax unified
	.thumb
	.fpu	vfpv3-d16
	.text

	.globl	divide
	.thumb_func
	.align
divide:
	eor	SCRATCH_REG,BSTACK_1,BSTACK_0
	cmp	BSTACK_0,#0
	it lt
	neglt	BSTACK_0,BSTACK_0
	cmp	BSTACK_1,#0
	it lt
	neglt	BSTACK_1,BSTACK_1

	cmp	BSTACK_0,#32
	bls	divide_by_small_number

	clz	BSTACK_3,BSTACK_0
	clz	BSTACK_2,BSTACK_1
	rsb	BSTACK_3,BSTACK_3,#31-5-11
	add	BSTACK_3,BSTACK_3,BSTACK_2
	mov	BSTACK_2,#0

	cmp	BSTACK_3,#32-5-11
	bhs	divide_large_result

	add	BSTACK_3,BSTACK_3,BSTACK_3,lsl #1
	.align @ alignment is right now, try to not make this a nop
	add	LINK_REG,pc,#6
	add	LINK_REG,LINK_REG,BSTACK_3,lsl #2
	mov	pc,LINK_REG

	.set	shift,32-5-11
	.rept	32-5-11
	.set	shift,shift-1
	subs	BSTACK_3,BSTACK_1,BSTACK_0,lsl #shift
	itt cs
	movcs	BSTACK_1,BSTACK_3
	orrcs	BSTACK_2,BSTACK_2,#1<<shift
	.endr

	mov	BSTACK_0,BSTACK_2
	cmp	SCRATCH_REG,#0
	it lt
	neglt	BSTACK_0,BSTACK_0
	ldr	pc,[sp],#4

	.thumb_func
divide_large_result:
	bpl	divide_result_0

	vmov    s13,BSTACK_1
	vmov    s15,BSTACK_0
	vcvt.f64.u32	d6,s13
	vcvt.f64.u32	d7,s15
	vdiv.f64	d7,d6,d7
	vcvt.u32.f64	s15,d7
	vmov	BSTACK_0,s15
	cmp	SCRATCH_REG,#0
	it lt
	neglt	BSTACK_0,BSTACK_0
	ldr	pc,[sp],#4

divide_result_0:
	mov	BSTACK_0,#0
	ldr	pc,[sp],#4

	.thumb_func
	.align
divide_by_small_number:
	mov	BSTACK_3,BSTACK_0,lsl #3
	add	BSTACK_3,BSTACK_3,pc
	ldrb	BSTACK_0,[BSTACK_3,#(div_mod_table+1)-(divide_by_small_number+8)]
	ldr	BSTACK_2,[BSTACK_3,#(div_mod_table+4)-(divide_by_small_number+8)]
	ldrb	BSTACK_3,[BSTACK_3,#div_mod_table-(divide_by_small_number+8)]
	adds	BSTACK_1,BSTACK_1,BSTACK_0
	it cc
	umullcc	BSTACK_0,BSTACK_2,BSTACK_1,BSTACK_2
	lsr	BSTACK_0,BSTACK_2,BSTACK_3
	cmp	SCRATCH_REG,#0
	it lt
	neglt	BSTACK_0,BSTACK_0
	ldr	pc,[sp],#4

	.globl	modulo	
	.thumb_func
modulo:
	cmp	BSTACK_0,#0
	it lt
	neglt	BSTACK_0,BSTACK_0
	movs	SCRATCH_REG,BSTACK_1
	it lt
	neglt	BSTACK_1,BSTACK_1

	cmp	BSTACK_0,#32
	bls	modulo_of_small_number

	clz	BSTACK_3,BSTACK_0
	clz	BSTACK_2,BSTACK_1
	rsb	BSTACK_3,BSTACK_3,#31-5-11
	add	BSTACK_3,BSTACK_3,BSTACK_2

	cmp	BSTACK_3,#32-5-11
	bhs	modulo_large_divide_result

	.align
	add	LINK_REG,pc,#6
	add	LINK_REG,LINK_REG,BSTACK_3,lsl #3
	mov	pc,LINK_REG

	.set	shift,32
	.rept	32
	.set	shift,shift-1
	subs	BSTACK_3,BSTACK_1,BSTACK_0,lsl #shift
	it cs
	movcs	BSTACK_1,BSTACK_3
	.endr

modulo_divide_result_0:
	mov	BSTACK_0,BSTACK_1
	cmp	SCRATCH_REG,#0
	it lt
	neglt	BSTACK_0,BSTACK_0
	ldr	pc,[sp],#4

	.thumb_func
modulo_large_divide_result:
	bpl	modulo_divide_result_0

	vmov    s13,BSTACK_1
	vmov    s15,BSTACK_0
	vcvt.f64.u32	d6,s13
	vcvt.f64.u32	d7,s15
	vdiv.f64	d7,d6,d7
	vcvt.u32.f64	s15,d7
	vmov	BSTACK_2,s15
	b	modulo_from_quotient

	.thumb_func
	.align
modulo_of_small_number:
	add	BSTACK_3,pc,#4
	add	BSTACK_3,BSTACK_3,BSTACK_0,lsl #3
	ldrb	BSTACK_4,[BSTACK_3,#(div_mod_table+1)-(modulo_of_small_number+8)]
	ldr	BSTACK_2,[BSTACK_3,#(div_mod_table+4)-(modulo_of_small_number+8)]
	ldrb	BSTACK_3,[BSTACK_3,#div_mod_table-(modulo_of_small_number+8)]
	adds	LINK_REG,BSTACK_1,BSTACK_4
	it cc
	umullcc	BSTACK_4,BSTACK_2,LINK_REG,BSTACK_2
	lsr	BSTACK_2,BSTACK_2,BSTACK_3
	.thumb_func
modulo_from_quotient:
@	mls	BSTACK_0,BSTACK_0,BSTACK_2,BSTACK_1
	neg	BSTACK_1,BSTACK_1
	mla	BSTACK_0,BSTACK_0,BSTACK_2,BSTACK_1
	cmp	SCRATCH_REG,#0
	it ge
	negge	BSTACK_0,BSTACK_0
	ldr	pc,[sp],#4

div_mod_table:
	.long	0,0
	.long	0x100,0xffffffff
	.long	0,0x80000000
	.long	1,0xaaaaaaab
	.long	0,0x40000000
	.long	2,0xcccccccd
	.long	2,0xaaaaaaab
	.long	0x102,0x92492492
	.long	0,0x20000000
	.long	1,0x38e38e39
	.long	3,0xcccccccd
	.long	3,0xba2e8ba3
	.long	3,0xaaaaaaab
	.long	2,0x4ec4ec4f
	.long	0x103,0x92492492
	.long	3,0x88888889
	.long	0,0x10000000
	.long	4,0xf0f0f0f1
	.long	2,0x38e38e39
	.long	0x104,0xd79435e5
	.long	4,0xcccccccd
	.long	0x104,0xc30c30c3
	.long	4,0xba2e8ba3
	.long	4,0xb21642c9
	.long	4,0xaaaaaaab
	.long	3,0x51eb851f
	.long	3,0x4ec4ec4f
	.long	0x104,0x97b425ed	
	.long	0x104,0x92492492
	.long	4,0x8d3dcb09
	.long	4,0x88888889
	.long	0x104,0x84210842
	.long	0,0x08000000