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authorCamil Staps2016-09-18 15:14:10 +0000
committerCamil Staps2016-09-18 15:14:10 +0000
commit0644714a1d62a3ae5e9cdbde329801eebdaf9437 (patch)
treea03c1704e182a01e49caa201b2558ca7ab008d3c
parentPrepping thumb2fileIO3.s for Thumb-2 (diff)
divmod edited for Thumb-2
-rw-r--r--thumb2divmod.s30
1 files changed, 26 insertions, 4 deletions
diff --git a/thumb2divmod.s b/thumb2divmod.s
index c2c205f..e123c5e 100644
--- a/thumb2divmod.s
+++ b/thumb2divmod.s
@@ -1,5 +1,7 @@
.arch armv7-a
+ .syntax unified
+ .thumb
.fpu vfpv3-d16
.text
@@ -7,8 +9,10 @@
divide:
eor r12,r3,r4
cmp r4,#0
+ it lt
neglt r4,r4
cmp r3,#0
+ it lt
neglt r3,r3
cmp r4,#32
@@ -24,19 +28,24 @@ divide:
bhs divide_large_result
add r1,r1,r1,lsl #1
- add pc,pc,r1,lsl #2
+ mov r14,pc
+ add r14,r14,r1,lsl #2
+ mov pc,r14
nop
.set shift,32-5-11
.rept 32-5-11
.set shift,shift-1
subs r1,r3,r4,lsl #shift
+ it cs
movcs r3,r1
+ it cs
orrcs r2,r2,#1<<shift
.endr
mov r4,r2
cmp r12,#0
+ it lt
neglt r4,r4
ldr pc,[sp],#4
@@ -51,6 +60,7 @@ divide_large_result:
vcvt.u32.f64 s15,d7
vmov r4,s15
cmp r12,#0
+ it lt
neglt r4,r4
ldr pc,[sp],#4
@@ -59,22 +69,27 @@ divide_result_0:
ldr pc,[sp],#4
divide_by_small_number:
- add r1,pc,r4,lsl #3
+ mov r1,pc
+ add r1,r1,r4,lsl #3
ldrb r4,[r1,#(div_mod_table+1)-(divide_by_small_number+8)]
ldr r2,[r1,#(div_mod_table+4)-(divide_by_small_number+8)]
ldrb r1,[r1,#div_mod_table-(divide_by_small_number+8)]
adds r3,r3,r4
+ it cc
umullcc r4,r2,r3,r2
lsr r4,r2,r1
cmp r12,#0
+ it lt
neglt r4,r4
ldr pc,[sp],#4
.globl modulo
modulo:
cmp r4,#0
+ it lt
neglt r4,r4
movs r12,r3
+ it lt
neglt r3,r3
cmp r4,#32
@@ -88,13 +103,16 @@ modulo:
cmp r1,#32-5-11
bhs modulo_large_divide_result
- add pc,pc,r1,lsl #3
+ mov r14,pc
+ add r14,r14,r1,lsl #3
+ mov pc,r14
nop
.set shift,32
.rept 32
.set shift,shift-1
subs r1,r3,r4,lsl #shift
+ it cs
movcs r3,r1
.endr
@@ -113,15 +131,18 @@ modulo_large_divide_result:
modulo_divide_result_0:
mov r4,r3
cmp r12,#0
+ it lt
neglt r4,r4
ldr pc,[sp],#4
modulo_of_small_number:
- add r1,pc,r4,lsl #3
+ mov r1,pc
+ add r1,r1,r4,lsl #3
ldrb r0,[r1,#(div_mod_table+1)-(modulo_of_small_number+8)]
ldr r2,[r1,#(div_mod_table+4)-(modulo_of_small_number+8)]
ldrb r1,[r1,#div_mod_table-(modulo_of_small_number+8)]
adds r14,r3,r0
+ it cc
umullcc r0,r2,r14,r2
lsr r2,r2,r1
modulo_from_quotient:
@@ -129,6 +150,7 @@ modulo_from_quotient:
neg r3,r3
mla r4,r4,r2,r3
cmp r12,#0
+ it lt
neglt r4,r4
ldr pc,[sp],#4