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-rw-r--r--cgaas.c12
-rw-r--r--cgawas.c12
-rw-r--r--cgcalc.c16
-rw-r--r--cgcode.c95
-rw-r--r--cgcodep.h10
-rw-r--r--cgconst.h2
-rw-r--r--cgias.c12
-rw-r--r--cgiconst.h1
-rw-r--r--cginput.c9
-rw-r--r--cgiwas.c12
-rw-r--r--cglin.c13
-rw-r--r--cgopt.c22
12 files changed, 161 insertions, 55 deletions
diff --git a/cgaas.c b/cgaas.c
index 6611607..0e95b8f 100644
--- a/cgaas.c
+++ b/cgaas.c
@@ -4397,6 +4397,18 @@ static void as_instructions (struct instruction *instruction)
case IDIVDU:
as_divdu_instruction (instruction);
break;
+ case IROTL:
+ as_shift_instruction (instruction,0);
+ break;
+ case IROTR:
+ as_shift_instruction (instruction,1);
+ break;
+ case IROTL_S:
+ as_shift_s_instruction (instruction,0);
+ break;
+ case IROTR_S:
+ as_shift_s_instruction (instruction,1);
+ break;
case IWORD:
store_c (instruction->instruction_parameters[0].parameter_data.i);
break;
diff --git a/cgawas.c b/cgawas.c
index 4a0b336..f1522d6 100644
--- a/cgawas.c
+++ b/cgawas.c
@@ -3537,6 +3537,18 @@ static void w_as_instructions (register struct instruction *instruction)
case IDIVDU:
w_as_divdu_instruction (instruction);
break;
+ case IROTL:
+ w_as_shift_instruction (instruction,"rol");
+ break;
+ case IROTR:
+ w_as_shift_instruction (instruction,"ror");
+ break;
+ case IROTL_S:
+ w_as_shift_s_instruction (instruction,"rol");
+ break;
+ case IROTR_S:
+ w_as_shift_s_instruction (instruction,"ror");
+ break;
case IFMOVE:
w_as_fmove_instruction (instruction);
break;
diff --git a/cgcalc.c b/cgcalc.c
index 34a9128..fdf83a7 100644
--- a/cgcalc.c
+++ b/cgcalc.c
@@ -2426,6 +2426,10 @@ void calculate_graph_register_uses (INSTRUCTION_GRAPH graph)
case GLSL:
case GLSR:
case GASR:
+#ifdef I486
+ case GROTL:
+ case GROTR:
+#endif
calculate_shift_operator (graph);
return;
case GCREATE:
@@ -2762,6 +2766,10 @@ void count_graph (INSTRUCTION_GRAPH graph)
case GSUB_O:
case GEOR:
case GASR:
+#ifdef I486
+ case GROTL:
+ case GROTR:
+#endif
case GCOPY:
case GBOUNDS:
#ifdef G_POWER
@@ -2978,6 +2986,10 @@ void mark_graph_2 (register INSTRUCTION_GRAPH graph)
case GSUB_O:
case GEOR:
case GASR:
+#ifdef I486
+ case GROTL:
+ case GROTR:
+#endif
case GCOPY:
case GBOUNDS:
#ifdef G_POWER
@@ -3210,6 +3222,10 @@ void mark_graph_1 (register INSTRUCTION_GRAPH graph)
case GSUB_O:
case GEOR:
case GASR:
+#ifdef I486
+ case GROTL:
+ case GROTR:
+#endif
case GCOPY:
case GBOUNDS:
#ifdef G_POWER
diff --git a/cgcode.c b/cgcode.c
index 8c24ee0..60163ff 100644
--- a/cgcode.c
+++ b/cgcode.c
@@ -2282,7 +2282,7 @@ void code_eqI (VOID)
s_put_b (0,graph_3);
}
-void code_eqI_a (LONG value,int a_offset)
+void code_eqI_a (CleanInt value,int a_offset)
{
INSTRUCTION_GRAPH graph_1,graph_2,graph_3,graph_4;
@@ -2294,7 +2294,7 @@ void code_eqI_a (LONG value,int a_offset)
s_push_b (graph_4);
}
-void code_eqI_b (LONG value,int b_offset)
+void code_eqI_b (CleanInt value,int b_offset)
{
INSTRUCTION_GRAPH graph_1,graph_2,graph_3;
@@ -3346,14 +3346,18 @@ void code_fillF_b (int b_offset,int a_offset)
s_put_a (a_offset,graph_5);
}
-void code_fillI (LONG value,int a_offset)
+void code_fillI (CleanInt value,int a_offset)
{
INSTRUCTION_GRAPH graph_1,graph_3,graph_4,graph_5;
graph_1=s_get_a (a_offset);
if (!parallel_flag &&
+#ifndef G_A64
(unsigned long)value<(unsigned long)33 && graph_1->instruction_code==GCREATE)
+#else
+ (uint_64)value<(uint_64)33 && graph_1->instruction_code==GCREATE)
+#endif
{
if (small_integers_label==NULL)
small_integers_label=enter_label ("small_integers",IMPORT_LABEL | DATA_LABEL);
@@ -5556,11 +5560,6 @@ void code_pushR_a (int a_offset)
graph_1=s_get_a (a_offset);
if (!mc68881_flag){
- /*
- graph_2=g_movem (ARGUMENTS_OFFSET,graph_1,2);
- graph_3=g_movemi (0,graph_2);
- graph_4=g_movemi (1,graph_2);
- */
graph_3=g_load_id (ARGUMENTS_OFFSET-NODE_POINTER_OFFSET,graph_1);
graph_4=g_load_id (ARGUMENTS_OFFSET-NODE_POINTER_OFFSET+4,graph_1);
} else {
@@ -7019,6 +7018,57 @@ void code_release (void)
{
}
+#ifdef I486
+static INSTRUCTION_GRAPH remove_and_31_or_63 (INSTRUCTION_GRAPH graph)
+{
+ if (graph->instruction_parameters[0].p->instruction_code==GLOAD_I &&
+# ifndef G_A64
+ graph->instruction_parameters[0].p->instruction_parameters[0].i==31)
+# else
+ graph->instruction_parameters[0].p->instruction_parameters[0].i==63)
+# endif
+ {
+ return graph->instruction_parameters[1].p;
+ }
+ if (graph->instruction_parameters[1].p->instruction_code==GLOAD_I &&
+# ifndef G_A64
+ graph->instruction_parameters[1].p->instruction_parameters[0].i==31)
+# else
+ graph->instruction_parameters[1].p->instruction_parameters[0].i==63)
+# endif
+ {
+ return graph->instruction_parameters[0].p;
+ }
+ return graph;
+}
+
+void code_rotl (void)
+{
+ INSTRUCTION_GRAPH graph_1,graph_2,graph_3;
+
+ graph_1=s_pop_b();
+ graph_2=s_get_b (0);
+ if (graph_2->instruction_code==GAND)
+ graph_2=remove_and_31_or_63 (graph_2);
+ graph_3=g_instruction_2 (GROTL,graph_2,graph_1);
+
+ s_put_b (0,graph_3);
+}
+
+void code_rotr (void)
+{
+ INSTRUCTION_GRAPH graph_1,graph_2,graph_3;
+
+ graph_1=s_pop_b();
+ graph_2=s_get_b (0);
+ if (graph_2->instruction_code==GAND)
+ graph_2=remove_and_31_or_63 (graph_2);
+ graph_3=g_instruction_2 (GROTR,graph_2,graph_1);
+
+ s_put_b (0,graph_3);
+}
+#endif
+
void code_rtn (void)
{
int b_offset,a_stack_size,b_stack_size,return_with_rts,n_data_parameter_registers;
@@ -7697,32 +7747,7 @@ void code_set_finalizers (VOID)
}
#endif
-#ifdef I486
-static INSTRUCTION_GRAPH remove_and_31_or_63 (INSTRUCTION_GRAPH graph)
-{
- if (graph->instruction_parameters[0].p->instruction_code==GLOAD_I &&
-# ifndef G_A64
- graph->instruction_parameters[0].p->instruction_parameters[0].i==31)
-# else
- graph->instruction_parameters[0].p->instruction_parameters[0].i==63)
-# endif
- {
- return graph->instruction_parameters[1].p;
- }
- if (graph->instruction_parameters[1].p->instruction_code==GLOAD_I &&
-# ifndef G_A64
- graph->instruction_parameters[1].p->instruction_parameters[0].i==31)
-# else
- graph->instruction_parameters[1].p->instruction_parameters[0].i==63)
-# endif
- {
- return graph->instruction_parameters[0].p;
- }
- return graph;
-}
-#endif
-
-void code_shiftl (VOID)
+void code_shiftl (void)
{
INSTRUCTION_GRAPH graph_1,graph_2,graph_3;
@@ -7737,7 +7762,7 @@ void code_shiftl (VOID)
s_put_b (0,graph_3);
}
-void code_shiftr (VOID)
+void code_shiftr (void)
{
INSTRUCTION_GRAPH graph_1,graph_2,graph_3;
diff --git a/cgcodep.h b/cgcodep.h
index ac343fe..9a5ba33 100644
--- a/cgcodep.h
+++ b/cgcodep.h
@@ -82,8 +82,8 @@ void code_eqC_a (int value,int a_offset);
void code_eqC_b (int value,int b_offset);
void code_eqD_b (char descriptor_name[],int arity);
void code_eqI (VOID);
-void code_eqI_a (LONG value,int a_offset);
-void code_eqI_b (LONG value,int b_offset);
+void code_eqI_a (CleanInt value,int a_offset);
+void code_eqI_b (CleanInt value,int b_offset);
void code_eqR (VOID);
void code_eqR_a (double value,int a_offset);
void code_eqR_b (double value,int b_offset);
@@ -113,7 +113,7 @@ void code_fillB_b (int b_offset,int a_offset);
void code_fillC (int value,int a_offset);
void code_fillC_b (int b_offset,int a_offset);
void code_fillF_b (int b_offset,int a_offset);
-void code_fillI (LONG value,int a_offset);
+void code_fillI (CleanInt value,int a_offset);
void code_fillI_b (int b_offset,int a_offset);
void code_fillR (double value,int a_offset);
void code_fillR_b (int b_offset,int a_offset);
@@ -252,6 +252,10 @@ void code_replace (char element_descriptor[],int a_size,int b_size);
void code_repl_arg (int arity,int argument_n);
void code_repl_args (int arity,int n_arguments);
void code_repl_args_b (VOID);
+#ifdef I486
+void code_rotl (void);
+void code_rotr (void);
+#endif
void code_rtn (VOID);
void code_RtoI (VOID);
void code_select (char *element_descriptor,int a_size,int b_size);
diff --git a/cgconst.h b/cgconst.h
index 4e6d1b1..6e26a35 100644
--- a/cgconst.h
+++ b/cgconst.h
@@ -29,7 +29,7 @@ enum {
,GDIVU
#endif
#ifdef I486
- ,GFLOORDIV, GMOD
+ ,GFLOORDIV, GMOD, GROTL, GROTR
,GADDDU, GDIVDU, GMULUD, GREMU, GRESULT0, GRESULT1, GSUBDU
,GFLOAD_S_X,GFSTORE_S_X
#endif
diff --git a/cgias.c b/cgias.c
index 286ccf0..e58b132 100644
--- a/cgias.c
+++ b/cgias.c
@@ -4908,6 +4908,18 @@ static void as_instructions (struct instruction *instruction)
case IWORD:
store_c (instruction->instruction_parameters[0].parameter_data.i);
break;
+ case IROTL:
+ as_shift_instruction (instruction,0);
+ break;
+ case IROTR:
+ as_shift_instruction (instruction,1);
+ break;
+ case IROTL_S:
+ as_shift_s_instruction (instruction,0);
+ break;
+ case IROTR_S:
+ as_shift_s_instruction (instruction,1);
+ break;
case IFMOVE:
instruction=as_fmove_instruction (instruction);
break;
diff --git a/cgiconst.h b/cgiconst.h
index fb5b138..1a49223 100644
--- a/cgiconst.h
+++ b/cgiconst.h
@@ -50,6 +50,7 @@ enum {
#endif
#ifdef I486
,IASR_S,ILSL_S,ILSR_S
+ ,IROTL,IROTR,IROTL_S,IROTR_S
#endif
#if defined (I486) && !defined (G_A64)
,IFCEQ, IFCGE, IFCGT, IFCLE, IFCLT, IFCNE
diff --git a/cginput.c b/cginput.c
index e76653c..3aaf37d 100644
--- a/cginput.c
+++ b/cginput.c
@@ -1597,10 +1597,6 @@ static int parse_directive_n_n_t (InstructionP instruction)
{
LONG n1,n2;
int i;
-/* CHANGED 8-3-98
- static ULONG small_vector,*vector_p;
- static int vector_size=0;
-*/
static ULONG small_vector;
ULONG *vector_p;
int vector_size=0;
@@ -1609,7 +1605,6 @@ static int parse_directive_n_n_t (InstructionP instruction)
return 0;
vector_size=n2;
-/* CHANGED 6-8-92: one extra */
if (vector_size+1<=SMALL_VECTOR_SIZE)
vector_p=&small_vector;
else
@@ -2322,6 +2317,10 @@ static void put_instructions_in_table2 (void)
put_instruction_name ("repl_args_b", parse_instruction, code_repl_args_b );
put_instruction_name ("repl_r_args", parse_instruction_n_n, code_repl_r_args );
put_instruction_name ("repl_r_args_a", parse_instruction_n_n_n_n, code_repl_r_args_a );
+#ifdef I486
+ put_instruction_name ("rotl%", parse_instruction, code_rotl );
+ put_instruction_name ("rotr%", parse_instruction, code_rotr );
+#endif
put_instruction_name ("rtn", parse_instruction, code_rtn );
put_instruction_name ("RtoI", parse_instruction, code_RtoI );
put_instruction_name ("select", parse_instruction_a_n_n, code_select );
diff --git a/cgiwas.c b/cgiwas.c
index a62ff2a..acaa9e9 100644
--- a/cgiwas.c
+++ b/cgiwas.c
@@ -4016,6 +4016,18 @@ static void w_as_instructions (register struct instruction *instruction)
case IMOD:
w_as_floordiv_mod_instruction (instruction,1);
break;
+ case IROTL:
+ w_as_shift_instruction (instruction,"rol");
+ break;
+ case IROTR:
+ w_as_shift_instruction (instruction,"ror");
+ break;
+ case IROTL_S:
+ w_as_shift_s_instruction (instruction,"rol");
+ break;
+ case IROTR_S:
+ w_as_shift_s_instruction (instruction,"ror");
+ break;
case IFMOVE:
instruction=w_as_fmove_instruction (instruction);
break;
diff --git a/cglin.c b/cglin.c
index fd25d59..40c902e 100644
--- a/cglin.c
+++ b/cglin.c
@@ -4560,7 +4560,6 @@ static ADDRESS *evaluate_arguments (union instruction_parameter arguments[],int
arguments[first_argument_number].p=f_graph;
arguments[first_argument_number+1].p=f_graph;
- /* CHANGED 22-10-1999 */
{
int f_graph_count;
@@ -4571,9 +4570,6 @@ static ADDRESS *evaluate_arguments (union instruction_parameter arguments[],int
--f_graph_count;
f_graph->node_count=f_graph_count+1;
}
- /*
- --f_graph->node_count;
- */
linearize_float_graph (f_graph,&ad_a[first_argument_number]);
argument_evaluated[first_argument_number]=1;
@@ -4814,7 +4810,6 @@ static void linearize_load_graph (register INSTRUCTION_GRAPH load_graph)
i_fmove_id_fr (load_graph->instruction_parameters[0].i,load_graph->instruction_parameters[1].i,reg);
float_register_node (load_graph,reg);
-
break;
}
case GREGISTER:
@@ -9016,6 +9011,14 @@ static void linearize_graph (INSTRUCTION_GRAPH graph,ADDRESS *ad_p)
linearize_monadic_data_operator (INOT,graph,ad_p);
return;
#endif
+#ifdef I486
+ case GROTL:
+ linearize_shift_operator (IROTL,IROTL_S,graph,ad_p);
+ return;
+ case GROTR:
+ linearize_shift_operator (IROTR,IROTR_S,graph,ad_p);
+ return;
+#endif
case GMOVEMI:
linearize_movemi_operator (graph,ad_p);
return;
diff --git a/cgopt.c b/cgopt.c
index f27a14f..5d8f4ae 100644
--- a/cgopt.c
+++ b/cgopt.c
@@ -683,6 +683,8 @@ static void compute_maximum_b_stack_offsets (register int b_offset)
instruction->instruction_icode!=ILSR_S &&
instruction->instruction_icode!=IFLOORDIV &&
instruction->instruction_icode!=IMOD &&
+ instruction->instruction_icode!=IROTL_S &&
+ instruction->instruction_icode!=IROTR_S &&
#endif
instruction->instruction_icode!=IREM)
#ifdef M68000
@@ -923,7 +925,9 @@ void optimize_stack_access (struct basic_block *block,int *a_offset_p,int *b_off
instruction->instruction_icode!=ILSR_S &&
instruction->instruction_icode!=IFLOORDIV &&
instruction->instruction_icode!=IMOD &&
- instruction->instruction_icode!=IREM)
+ instruction->instruction_icode!=IREM &&
+ instruction->instruction_icode!=IROTL_S &&
+ instruction->instruction_icode!=IROTR_S)
internal_error_in_function ("optimize_stack_access");
/* only first argument of mod might be register indirect */
/* no break ! */
@@ -1537,6 +1541,9 @@ static void store_next_uses (struct instruction *instruction)
#ifndef I486_USE_SCRATCH_REGISTER
case IASR: case ILSL: case ILSR:
case IDIV:
+# ifdef I486
+ case IROTL: case IROTR:
+# endif
#endif
#if defined (I486) && !defined (I486_USE_SCRATCH_REGISTER)
case IMULUD:
@@ -1564,7 +1571,7 @@ IF_G_POWER ( case IUMULH: )
use_parameter (&instruction->instruction_parameters[0]);
break;
#ifdef I486_USE_SCRATCH_REGISTER
- case IASR: case ILSL: case ILSR:
+ case IASR: case ILSL: case ILSR: case IROTL: case IROTR:
if (instruction->instruction_parameters[0].parameter_type!=P_IMMEDIATE)
define_scratch_register();
use_parameter (&instruction->instruction_parameters[1]);
@@ -1661,7 +1668,7 @@ IF_G_RISC (case IADDI: case ILSLI:)
# endif
#endif
#ifdef I486
- case IASR_S: case ILSL_S: case ILSR_S:
+ case IASR_S: case ILSL_S: case ILSR_S: case IROTL_S: case IROTR_S:
define_parameter (&instruction->instruction_parameters[2]);
use_parameter (&instruction->instruction_parameters[1]);
use_parameter (&instruction->instruction_parameters[0]);
@@ -2014,7 +2021,7 @@ static int find_register (int reg_n,register struct register_allocation *reg_all
real_reg_n=reg_n;
#endif
else {
- register int i;
+ int i;
#ifdef NEW_R_ALLOC
if (register_flag!=F_REGISTER){
@@ -3864,6 +3871,9 @@ static void allocate_registers (struct basic_block *basic_block)
#ifndef I486_USE_SCRATCH_REGISTER
case IASR: case ILSL: case ILSR:
case IDIV:
+# ifdef I486
+ case IROTL: case IROTR:
+# endif
#endif
#if (defined (I486) && !defined (I486_USE_SCRATCH_REGISTER)) || defined (G_POWER)
case IDIVU:
@@ -3879,7 +3889,7 @@ IF_G_POWER ( case IUMULH: )
instruction_use_2 (instruction,USE_DEF);
break;
#ifdef I486_USE_SCRATCH_REGISTER
- case IASR: case ILSL: case ILSR:
+ case IASR: case ILSL: case ILSR: case IROTL: case IROTR:
if (instruction->instruction_parameters[0].parameter_type!=P_IMMEDIATE)
use_scratch_register();
instruction_use_2 (instruction,USE_DEF);
@@ -3994,7 +4004,7 @@ IF_G_RISC (case IADDI: case ILSLI:)
#endif
#ifdef I486
- case IASR_S: case ILSL_S: case ILSR_S:
+ case IASR_S: case ILSL_S: case ILSR_S: case IROTL_S: ITOTR_S:
use_3_same_type_registers
(&instruction->instruction_parameters[0].parameter_data.reg,USE,
&instruction->instruction_parameters[1].parameter_data.reg,USE_DEF,
generated by cgit v1.2.3 (git 2.39.1) at 2025-03-15 02:11:39 +0000