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-rw-r--r--cgcode.c246
-rw-r--r--cgcodep.h5
-rw-r--r--cginput.c12
-rw-r--r--cglin.c244
-rw-r--r--cgsas.c240
-rw-r--r--cgswas.c327
6 files changed, 769 insertions, 305 deletions
diff --git a/cgcode.c b/cgcode.c
index f6e17bd..657a690 100644
--- a/cgcode.c
+++ b/cgcode.c
@@ -87,6 +87,38 @@
# define SMALL_LAZY_DESCRIPTORS 0
#endif
+#ifdef sparc
+# undef ALIGN_REAL_ARRAYS
+# undef NEW_ARRAYS
+# undef LOAD_STORE_ALIGNED_REAL 4
+# undef ARRAY_SIZE_BEFORE_DESCRIPTOR
+#endif
+
+#ifdef G_POWER
+# undef NEW_ARRAYS
+# undef ARRAY_SIZE_BEFORE_DESCRIPTOR
+#endif
+
+#ifdef NEW_ARRAYS
+# ifdef ARRAY_SIZE_BEFORE_DESCRIPTOR
+# define ARRAY_ELEMENTS_OFFSET 4
+# else
+# define ARRAY_ELEMENTS_OFFSET 8
+# endif
+#else
+# define ARRAY_ELEMENTS_OFFSET 12
+#endif
+
+#if defined (NEW_ARRAYS) || defined (ALIGN_REAL_ARRAYS)
+# ifdef ARRAY_SIZE_BEFORE_DESCRIPTOR
+# define REAL_ARRAY_ELEMENTS_OFFSET 4
+# else
+# define REAL_ARRAY_ELEMENTS_OFFSET 8
+# endif
+#else
+# define REAL_ARRAY_ELEMENTS_OFFSET 12
+#endif
+
#ifdef __MWERKS__
int mystrcmp (char *p1,char *p2)
{
@@ -192,8 +224,8 @@ int no_time_profiling;
# define g_remu(g1,g2) g_instruction_2(GREMU,(g1),(g2))
#endif
#define g_mul(g1,g2) g_instruction_2(GMUL,(g1),(g2))
+#define g_neg(g1) g_instruction_1(GNEG,(g1))
#if defined (I486) || defined (G_POWER)
-# define g_neg(g1) g_instruction_1(GNEG,(g1))
# define g_not(g1) g_instruction_1(GNOT,(g1))
#endif
#define g_or(g1,g2) g_instruction_2(GOR,(g1),(g2))
@@ -451,12 +483,10 @@ static void code_dyadic_sane_operator (LABEL *label)
#endif
}
-#if defined (I486) || defined (G_POWER)
void code_absR (void)
{
code_monadic_real_operator (GFABS);
}
-#endif
void code_acosR (VOID)
{
@@ -1170,8 +1200,13 @@ void code_CtoAC (VOID)
graph_3=g_lsl (g_load_i (24),graph_3);
#endif
+#ifdef ARRAY_SIZE_BEFORE_DESCRIPTOR
+ graph_4=g_create_3 (graph_2,graph_1,graph_3);
+ graph_4=g_add (g_load_i (4),graph_4);
+#else
graph_4=g_create_3 (graph_1,graph_2,graph_3);
-
+#endif
+
s_push_a (graph_4);
}
@@ -2137,15 +2172,14 @@ void code_eq_nulldesc (char descriptor_name[],int a_offset)
#ifdef GEN_MAC_OBJ
graph_2=g_load_des_id (DESCRIPTOR_OFFSET,graph_1);
graph_3=g_g_register (GLOBAL_DATA_REGISTER);
+ graph_4=g_add (graph_3,graph_2);
#else
graph_2=g_load_id (0,graph_1);
- graph_3=g_load_i (-2);
#endif
- graph_4=g_add (graph_3,graph_2);
#ifdef GEN_MAC_OBJ
graph_5=g_load_des_id (0,graph_4);
#else
- graph_5=g_load_des_id (2,graph_4);
+ graph_5=g_load_des_id (2-2,graph_2);
#endif
graph_6=g_sub (graph_5,graph_2);
graph_7=g_load_des_i (descriptor,0);
@@ -3204,13 +3238,13 @@ void code_get_node_arity (int a_offset)
#ifdef GEN_MAC_OBJ
graph_2=g_load_des_id (DESCRIPTOR_OFFSET,graph_1);
graph_3=g_g_register (GLOBAL_DATA_REGISTER);
+ graph_4=g_add (graph_3,graph_2);
+ graph_5=g_load_des_id (0,graph_4);
#else
graph_2=g_load_id (0,graph_1);
- graph_3=g_load_i (-2);
+ graph_5=g_load_des_id (-2,graph_2);
#endif
- graph_4=g_add (graph_3,graph_2);
- graph_5=g_load_des_id (0,graph_4);
-
+
#ifdef GEN_MAC_OBJ
graph_6=g_load_i (2);
graph_7=g_lsr (graph_6,graph_5);
@@ -3221,6 +3255,21 @@ void code_get_node_arity (int a_offset)
s_push_b (graph_7);
}
+void code_get_desc_flags_b (void)
+{
+ INSTRUCTION_GRAPH graph_1,graph_2;
+
+ graph_1=s_pop_b ();
+
+#ifndef GEN_MAC_OBJ
+ graph_2=g_load_des_id (-2-2+DESCRIPTOR_ARITY_OFFSET,graph_1);
+
+ s_push_b (graph_2);
+#else
+ s_push_b (g_load_i (0));
+#endif
+}
+
void code_gtC (VOID)
{
INSTRUCTION_GRAPH graph_1,graph_2,graph_3;
@@ -3322,13 +3371,13 @@ void code_is_record (int a_offset)
graph_1=s_get_a (a_offset);
#if defined (sparc) || defined (I486) || defined (G_POWER)
graph_2=g_load_id (0,graph_1);
- graph_3=g_load_i (-2);
+ graph_5=g_load_des_id (-2,graph_2);
#else
graph_2=g_load_des_id (DESCRIPTOR_OFFSET,graph_1);
graph_3=g_g_register (GLOBAL_DATA_REGISTER);
-#endif
graph_4=g_add (graph_3,graph_2);
graph_5=g_load_des_id (0,graph_4);
+#endif
graph_6=g_load_i (127);
graph_7=g_cmp_gt (graph_6,graph_5);
@@ -4337,7 +4386,6 @@ void code_nu (int a_size,int b_size,char *descriptor_name,char *ea_label_name)
last_block->block_ea_label=NULL;
}
-#if defined (I486) || defined (G_POWER)
void code_negI (void)
{
INSTRUCTION_GRAPH graph_1,graph_2;
@@ -4347,7 +4395,6 @@ void code_negI (void)
s_put_b (0,graph_2);
}
-#endif
void code_negR (void)
{
@@ -4994,7 +5041,11 @@ void code_push_arraysize (char element_descriptor[],int a_size,int b_size)
INSTRUCTION_GRAPH graph_1,graph_2;
graph_1=s_pop_a();
+#ifdef ARRAY_SIZE_BEFORE_DESCRIPTOR
+ graph_2=g_load_id (-4,graph_1);
+#else
graph_2=g_load_id (4,graph_1);
+#endif
s_push_b (graph_2);
}
@@ -5477,21 +5528,20 @@ static INSTRUCTION_GRAPH g_lsl_2_add_12 (INSTRUCTION_GRAPH graph_1)
graph_1_arg_1=graph_1->instruction_parameters[0].p;
graph_1_arg_2=graph_1->instruction_parameters[1].p;
if (graph_1_arg_1->instruction_code==GLOAD_I)
- return g_add (g_load_i (12+(graph_1_arg_1->instruction_parameters[0].i<<2)),g_lsl_2 (graph_1_arg_2));
+ return g_add (g_load_i (ARRAY_ELEMENTS_OFFSET+(graph_1_arg_1->instruction_parameters[0].i<<2)),g_lsl_2 (graph_1_arg_2));
if (graph_1_arg_2->instruction_code==GLOAD_I)
- return g_add (g_load_i (12+(graph_1_arg_2->instruction_parameters[0].i<<2)),g_lsl_2 (graph_1_arg_1));
+ return g_add (g_load_i (ARRAY_ELEMENTS_OFFSET+(graph_1_arg_2->instruction_parameters[0].i<<2)),g_lsl_2 (graph_1_arg_1));
} else if (graph_1->instruction_code==GSUB){
INSTRUCTION_GRAPH graph_1_arg_1,graph_1_arg_2;
graph_1_arg_1=graph_1->instruction_parameters[0].p;
graph_1_arg_2=graph_1->instruction_parameters[1].p;
if (graph_1_arg_1->instruction_code==GLOAD_I)
- return g_add (g_load_i (12-(graph_1_arg_1->instruction_parameters[0].i<<2)),g_lsl_2 (graph_1_arg_2));
+ return g_add (g_load_i (ARRAY_ELEMENTS_OFFSET-(graph_1_arg_1->instruction_parameters[0].i<<2)),g_lsl_2 (graph_1_arg_2));
if (graph_1_arg_2->instruction_code==GLOAD_I)
- return g_sub (g_lsl_2 (graph_1_arg_1),g_load_i (12+(graph_1_arg_2->instruction_parameters[0].i<<2)));
+ return g_sub (g_lsl_2 (graph_1_arg_1),g_load_i (ARRAY_ELEMENTS_OFFSET+(graph_1_arg_2->instruction_parameters[0].i<<2)));
}
- graph_2=g_add (g_load_i (12),g_lsl_2 (graph_1));
-
+ graph_2=g_add (g_load_i (ARRAY_ELEMENTS_OFFSET),g_lsl_2 (graph_1));
#ifdef INDEX_CSE
i=n_lsl_2_add_12_cache & (INDEX_CSE_CACHE_SIZE-1);
@@ -5503,7 +5553,7 @@ static INSTRUCTION_GRAPH g_lsl_2_add_12 (INSTRUCTION_GRAPH graph_1)
return graph_2;
}
-/* just add_12 for sparc */
+/* just lsl_3 for sparc if ! ALIGN_REAL_ARRAYS */
static INSTRUCTION_GRAPH g_lsl_3_add_12 (INSTRUCTION_GRAPH graph_1)
{
INSTRUCTION_GRAPH graph_2;
@@ -5539,7 +5589,7 @@ static INSTRUCTION_GRAPH g_lsl_3_add_12 (INSTRUCTION_GRAPH graph_1)
}
#endif
-#ifdef sparc
+#if defined (sparc) && !defined (ALIGN_REAL_ARRAYS)
graph_2=g_lsl (g_load_i (3),graph_1);
#else
if (graph_1->instruction_code==GADD){
@@ -5561,7 +5611,7 @@ static INSTRUCTION_GRAPH g_lsl_3_add_12 (INSTRUCTION_GRAPH graph_1)
if (graph_1_arg_2->instruction_code==GLOAD_I)
return g_sub (g_lsl_3 (graph_1_arg_1),g_load_i (12+(graph_1_arg_2->instruction_parameters[0].i<<3)));
}
- graph_2=g_add (g_load_i (12),g_lsl_3 (graph_1));
+ graph_2=g_add (g_load_i (REAL_ARRAY_ELEMENTS_OFFSET,g_lsl_3 (graph_1));
#endif
#ifdef INDEX_CSE
@@ -5623,10 +5673,10 @@ static void code_replaceI (VOID)
graph_3=s_get_b (0);
if (!check_index_flag && graph_2->instruction_code==GLOAD_I &&
- LESS_UNSIGNED (graph_2->instruction_parameters[0].i,(MAX_INDIRECT_OFFSET-12)>>2))
+ LESS_UNSIGNED (graph_2->instruction_parameters[0].i,(MAX_INDIRECT_OFFSET-ARRAY_ELEMENTS_OFFSET)>>2))
{
int offset;
- offset=12+(graph_2->instruction_parameters[0].i<<2);
+ offset=ARRAY_ELEMENTS_OFFSET+(graph_2->instruction_parameters[0].i<<2);
graph_5=g_load_x (graph_1,offset,0,NULL);
graph_4=g_store_x (graph_3,graph_1,offset,0,NULL);
@@ -5638,14 +5688,14 @@ static void code_replaceI (VOID)
# ifdef M68000
if (mc68000_flag){
graph_2=g_lsl (g_load_i (2),graph_2);
- graph_5=g_load_x (graph_1,12,0,graph_2);
- graph_4=g_store_x (graph_3,graph_1,12,0,graph_2);
+ graph_5=g_load_x (graph_1,ARRAY_ELEMENTS_OFFSET,0,graph_2);
+ graph_4=g_store_x (graph_3,graph_1,ARRAY_ELEMENTS_OFFSET,0,graph_2);
} else
# endif
{
int offset;
- graph_2=optimize_array_index (12,2,graph_2,&offset);
+ graph_2=optimize_array_index (ARRAY_ELEMENTS_OFFSET,2,graph_2,&offset);
graph_5=g_load_x (graph_1,offset,2,graph_2);
graph_4=g_store_x (graph_3,graph_1,offset,2,graph_2);
}
@@ -5733,11 +5783,11 @@ static void code_lazy_replace (VOID)
graph_3=s_pop_b();
if (!check_index_flag && graph_3->instruction_code==GLOAD_I &&
- LESS_UNSIGNED (graph_3->instruction_parameters[0].i,(MAX_INDIRECT_OFFSET-12)>>2))
+ LESS_UNSIGNED (graph_3->instruction_parameters[0].i,(MAX_INDIRECT_OFFSET-ARRAY_ELEMENTS_OFFSET)>>2))
{
int offset;
- offset=12+(graph_3->instruction_parameters[0].i<<2);
+ offset=ARRAY_ELEMENTS_OFFSET+(graph_3->instruction_parameters[0].i<<2);
graph_5=g_load_x (graph_1,offset,0,NULL);
graph_4=g_store_x (graph_2,graph_1,offset,0,NULL);
} else {
@@ -5748,14 +5798,14 @@ static void code_lazy_replace (VOID)
# ifdef M68000
if (mc68000_flag){
graph_3=g_lsl (g_load_i (2),graph_3);
- graph_5=g_load_x (graph_1,12,0,graph_3);
- graph_4=g_store_x (graph_2,graph_1,12,0,graph_3);
+ graph_5=g_load_x (graph_1,ARRAY_ELEMENTS_OFFSET,0,graph_3);
+ graph_4=g_store_x (graph_2,graph_1,ARRAY_ELEMENTS_OFFSET,0,graph_3);
} else
# endif
{
int offset;
- graph_3=optimize_array_index (12,2,graph_3,&offset);
+ graph_3=optimize_array_index (ARRAY_ELEMENTS_OFFSET,2,graph_3,&offset);
graph_5=g_load_x (graph_1,offset,2,graph_3);
graph_4=g_store_x (graph_2,graph_1,offset,2,graph_3);
}
@@ -5790,7 +5840,7 @@ static void code_replaceR (VOID)
{
int offset;
- offset=12+(graph_2->instruction_parameters[0].i<<3);
+ offset=REAL_ARRAY_ELEMENTS_OFFSET+(graph_2->instruction_parameters[0].i<<3);
graph_9=g_load_x (graph_1,offset,0,NULL);
graph_10=g_load_x (graph_1,offset+4,0,NULL);
graph_7=g_store_x (graph_3,graph_1,offset,0,NULL);
@@ -5799,15 +5849,15 @@ static void code_replaceR (VOID)
if (mc68000_flag){
graph_5=g_load_i (3);
graph_6=g_lsl (graph_5,graph_2);
- graph_9=g_load_x (graph_1,12,0,graph_6);
- graph_10=g_load_x (graph_1,16,0,graph_6);
- graph_7=g_store_x (graph_3,graph_1,12,0,graph_6);
+ graph_9=g_load_x (graph_1,REAL_ARRAY_ELEMENTS_OFFSET,0,graph_6);
+ graph_10=g_load_x (graph_1,REAL_ARRAY_ELEMENTS_OFFSET+4,0,graph_6);
+ graph_7=g_store_x (graph_3,graph_1,REAL_ARRAY_ELEMENTS_OFFSET,0,graph_6);
graph_8=g_store_x (graph_4,graph_7,16,0,graph_6);
} else {
- graph_9=g_load_x (graph_1,12,3,graph_2);
- graph_10=g_load_x (graph_1,16,3,graph_2);
- graph_7=g_store_x (graph_3,graph_1,12,3,graph_2);
- graph_8=g_store_x (graph_4,graph_7,16,3,graph_2);
+ graph_9=g_load_x (graph_1,REAL_ARRAY_ELEMENTS_OFFSET,3,graph_2);
+ graph_10=g_load_x (graph_1,REAL_ARRAY_ELEMENTS_OFFSET+4,3,graph_2);
+ graph_7=g_store_x (graph_3,graph_1,REAL_ARRAY_ELEMENTS_OFFSET,3,graph_2);
+ graph_8=g_store_x (graph_4,graph_7,REAL_ARRAY_ELEMENTS_OFFSET+4,3,graph_2);
}
}
} else
@@ -5816,31 +5866,35 @@ static void code_replaceR (VOID)
graph_7=g_fjoin (graph_3,graph_4);
if (!check_index_flag && graph_2->instruction_code==GLOAD_I &&
- LESS_UNSIGNED (graph_2->instruction_parameters[0].i,(MAX_INDIRECT_OFFSET-12)>>3))
+ LESS_UNSIGNED (graph_2->instruction_parameters[0].i,(MAX_INDIRECT_OFFSET-REAL_ARRAY_ELEMENTS_OFFSET)>>3))
{
int offset;
- offset=12+(graph_2->instruction_parameters[0].i<<3);
+ offset=REAL_ARRAY_ELEMENTS_OFFSET+(graph_2->instruction_parameters[0].i<<3);
graph_4=g_fload_x (graph_1,offset,0,NULL);
graph_8=g_fstore_x (graph_7,graph_1,offset,0,NULL);
} else {
#if defined (M68000) || defined (I486)
int offset;
- graph_2=optimize_array_index (12,3,graph_2,&offset);
+ graph_2=optimize_array_index (REAL_ARRAY_ELEMENTS_OFFSET,3,graph_2,&offset);
graph_4=g_fload_x (graph_1,offset,3,graph_2);
graph_8=g_fstore_x (graph_7,graph_1,offset,3,graph_2);
#else
graph_2=g_lsl_3_add_12 (graph_2);
-# ifdef sparc
- graph_4=g_fload_x (graph_1,12,0,graph_2);
- graph_8=g_fstore_x (graph_7,graph_1,12,0,graph_2);
+# if defined (sparc) && !defined (ALIGN_REAL_ARRAYS)
+ graph_4=g_fload_x (graph_1,REAL_ARRAY_ELEMENTS_OFFSET,0,graph_2);
+ graph_8=g_fstore_x (graph_7,graph_1,REAL_ARRAY_ELEMENTS_OFFSET,0,graph_2);
# else
graph_4=g_fload_x (graph_1,0,0,graph_2);
graph_8=g_fstore_x (graph_7,graph_1,0,0,graph_2);
# endif
#endif
}
+#ifdef ALIGN_REAL_ARRAYS
+ graph_4->inode_arity |= LOAD_STORE_ALIGNED_REAL;
+ graph_8->inode_arity |= LOAD_STORE_ALIGNED_REAL;
+#endif
g_fhighlow (graph_9,graph_10,graph_4);
}
@@ -5932,7 +5986,7 @@ void code_replace (char element_descriptor[],int a_size,int b_size)
if (element_descriptor[1]=='O' && element_descriptor[2]=='O' && element_descriptor[3]=='L' &&
element_descriptor[4]=='\0')
{
- code_replaceBC (12,1);
+ code_replaceBC (ARRAY_ELEMENTS_OFFSET,1);
return;
}
break;
@@ -5940,7 +5994,11 @@ void code_replace (char element_descriptor[],int a_size,int b_size)
if (element_descriptor[1]=='H' && element_descriptor[2]=='A' && element_descriptor[3]=='R' &&
element_descriptor[4]=='\0')
{
+#ifdef ARRAY_SIZE_BEFORE_DESCRIPTOR
+ code_replaceBC (4,0);
+#else
code_replaceBC (8,0);
+#endif
return;
}
break;
@@ -6330,9 +6388,9 @@ static void code_lazy_select (VOID)
graph_2=s_pop_b();
if (!check_index_flag && graph_2->instruction_code==GLOAD_I &&
- (unsigned long) graph_2->instruction_parameters[0].i < (unsigned long) ((MAX_INDIRECT_OFFSET-12)>>2))
+ (unsigned long) graph_2->instruction_parameters[0].i < (unsigned long) ((MAX_INDIRECT_OFFSET-ARRAY_ELEMENTS_OFFSET)>>2))
{
- graph_3=g_load_x (graph_1,12+(graph_2->instruction_parameters[0].i<<2),0,NULL);
+ graph_3=g_load_x (graph_1,ARRAY_ELEMENTS_OFFSET+(graph_2->instruction_parameters[0].i<<2),0,NULL);
} else {
if (check_index_flag)
graph_2=g_bounds (graph_1,graph_2);
@@ -6341,13 +6399,13 @@ static void code_lazy_select (VOID)
# ifdef M68000
if (mc68000_flag){
graph_2=g_lsl (g_load_i (2),graph_2);
- graph_3=g_load_x (graph_1,12,0,graph_2);
+ graph_3=g_load_x (graph_1,ARRAY_ELEMENTS_OFFSET,0,graph_2);
} else
# endif
{
int offset;
- graph_2=optimize_array_index (12,2,graph_2,&offset);
+ graph_2=optimize_array_index (ARRAY_ELEMENTS_OFFSET,2,graph_2,&offset);
graph_3=g_load_x (graph_1,offset,2,graph_2);
}
#else
@@ -6413,9 +6471,9 @@ static void code_selectI (VOID)
#endif
if (!check_index_flag && graph_2->instruction_code==GLOAD_I &&
- LESS_UNSIGNED (graph_2->instruction_parameters[0].i,(MAX_INDIRECT_OFFSET-12)>>2))
+ LESS_UNSIGNED (graph_2->instruction_parameters[0].i,(MAX_INDIRECT_OFFSET-ARRAY_ELEMENTS_OFFSET)>>2))
{
- graph_3=g_load_x (graph_1,12+(graph_2->instruction_parameters[0].i<<2),0,NULL);
+ graph_3=g_load_x (graph_1,ARRAY_ELEMENTS_OFFSET+(graph_2->instruction_parameters[0].i<<2),0,NULL);
} else {
if (check_index_flag)
graph_2=g_bounds (graph_1,graph_2);
@@ -6424,13 +6482,13 @@ static void code_selectI (VOID)
# ifdef M68000
if (mc68000_flag){
graph_2=g_lsl (g_load_i (2),graph_2);
- graph_3=g_load_x (graph_1,12,0,graph_2);
+ graph_3=g_load_x (graph_1,ARRAY_ELEMENTS_OFFSET,0,graph_2);
} else
# endif
{
int offset;
- graph_2=optimize_array_index (12,2,graph_2,&offset);
+ graph_2=optimize_array_index (ARRAY_ELEMENTS_OFFSET,2,graph_2,&offset);
graph_3=g_load_x (graph_1,offset,2,graph_2);
}
#else
@@ -6459,7 +6517,7 @@ static void code_selectR (VOID)
{
int offset;
- offset=12+(graph_2->instruction_parameters[0].i<<3);
+ offset=REAL_ARRAY_ELEMENTS_OFFSET+(graph_2->instruction_parameters[0].i<<3);
graph_5=g_load_x (graph_1,offset,0,NULL);
graph_6=g_load_x (graph_1,offset+4,0,NULL);
@@ -6467,11 +6525,11 @@ static void code_selectR (VOID)
if (mc68000_flag){
graph_3=g_load_i (3);
graph_4=g_lsl (graph_3,graph_2);
- graph_5=g_load_x (graph_1,12,0,graph_4);
- graph_6=g_load_x (graph_1,16,0,graph_4);
+ graph_5=g_load_x (graph_1,REAL_ARRAY_ELEMENTS_OFFSET,0,graph_4);
+ graph_6=g_load_x (graph_1,REAL_ARRAY_ELEMENTS_OFFSET+4,0,graph_4);
} else {
- graph_5=g_load_x (graph_1,12,3,graph_2);
- graph_6=g_load_x (graph_1,16,3,graph_2);
+ graph_5=g_load_x (graph_1,REAL_ARRAY_ELEMENTS_OFFSET,3,graph_2);
+ graph_6=g_load_x (graph_1,REAL_ARRAY_ELEMENTS_OFFSET+4,3,graph_2);
}
}
} else
@@ -6479,24 +6537,27 @@ static void code_selectR (VOID)
{
if (!check_index_flag && graph_2->instruction_code==GLOAD_I &&
- LESS_UNSIGNED (graph_2->instruction_parameters[0].i,(MAX_INDIRECT_OFFSET-12)>>3))
+ LESS_UNSIGNED (graph_2->instruction_parameters[0].i,(MAX_INDIRECT_OFFSET-REAL_ARRAY_ELEMENTS_OFFSET)>>3))
{
- graph_4=g_fload_x (graph_1,12+(graph_2->instruction_parameters[0].i<<3),0,NULL);
+ graph_4=g_fload_x (graph_1,REAL_ARRAY_ELEMENTS_OFFSET+(graph_2->instruction_parameters[0].i<<3),0,NULL);
} else {
#if defined (M68000) || defined (I486)
int offset;
- graph_2=optimize_array_index (12,3,graph_2,&offset);
+ graph_2=optimize_array_index (REAL_ARRAY_ELEMENTS_OFFSET,3,graph_2,&offset);
graph_4=g_fload_x (graph_1,offset,3,graph_2);
#else
graph_2=g_lsl_3_add_12 (graph_2);
-# ifdef sparc
- graph_4=g_fload_x (graph_1,12,0,graph_2);
+# if defined (sparc) && !defined (ALIGN_REAL_ARRAYS)
+ graph_4=g_fload_x (graph_1,REAL_ARRAY_ELEMENTS_OFFSET,0,graph_2);
# else
graph_4=g_fload_x (graph_1,0,0,graph_2);
# endif
#endif
}
+#ifdef ALIGN_REAL_ARRAYS
+ graph_4->inode_arity |= LOAD_STORE_ALIGNED_REAL;
+#endif
g_fhighlow (graph_5,graph_6,graph_4);
}
@@ -6568,7 +6629,7 @@ void code_select (char element_descriptor[],int a_size,int b_size)
if (element_descriptor[1]=='O' && element_descriptor[2]=='O' && element_descriptor[3]=='L' &&
element_descriptor[4]=='\0')
{
- code_selectBC (12,1);
+ code_selectBC (ARRAY_ELEMENTS_OFFSET,1);
return;
}
break;
@@ -6576,7 +6637,11 @@ void code_select (char element_descriptor[],int a_size,int b_size)
if (element_descriptor[1]=='H' && element_descriptor[2]=='A' && element_descriptor[3]=='R' &&
element_descriptor[4]=='\0')
{
+#ifdef ARRAY_SIZE_BEFORE_DESCRIPTOR
+ code_selectBC (4,0);
+#else
code_selectBC (8,0);
+#endif
return;
}
break;
@@ -6906,9 +6971,9 @@ static void code_lazy_update (VOID)
graph_3=s_pop_b();
if (!check_index_flag && graph_3->instruction_code==GLOAD_I &&
- LESS_UNSIGNED (graph_3->instruction_parameters[0].i,(MAX_INDIRECT_OFFSET-12)>>2))
+ LESS_UNSIGNED (graph_3->instruction_parameters[0].i,(MAX_INDIRECT_OFFSET-ARRAY_ELEMENTS_OFFSET)>>2))
{
- graph_4=g_store_x (graph_2,graph_1,12+(graph_3->instruction_parameters[0].i<<2),0,NULL);
+ graph_4=g_store_x (graph_2,graph_1,ARRAY_ELEMENTS_OFFSET+(graph_3->instruction_parameters[0].i<<2),0,NULL);
} else {
if (check_index_flag)
graph_3=g_bounds (graph_1,graph_3);
@@ -6917,13 +6982,13 @@ static void code_lazy_update (VOID)
# ifdef M68000
if (mc68000_flag){
graph_3=g_lsl (g_load_i (2),graph_3);
- graph_4=g_store_x (graph_2,graph_1,12,0,graph_3);
+ graph_4=g_store_x (graph_2,graph_1,ARRAY_ELEMENTS_OFFSET,0,graph_3);
} else
# endif
{
int offset;
- graph_3=optimize_array_index (12,2,graph_3,&offset);
+ graph_3=optimize_array_index (ARRAY_ELEMENTS_OFFSET,2,graph_3,&offset);
graph_4=g_store_x (graph_2,graph_1,offset,2,graph_3);
}
#else
@@ -6988,9 +7053,9 @@ static void code_updateI (VOID)
#endif
if (!check_index_flag && graph_2->instruction_code==GLOAD_I &&
- LESS_UNSIGNED (graph_2->instruction_parameters[0].i,(MAX_INDIRECT_OFFSET-12)>>2))
+ LESS_UNSIGNED (graph_2->instruction_parameters[0].i,(MAX_INDIRECT_OFFSET-ARRAY_ELEMENTS_OFFSET)>>2))
{
- graph_4=g_store_x (graph_3,graph_1,12+(graph_2->instruction_parameters[0].i<<2),0,NULL);
+ graph_4=g_store_x (graph_3,graph_1,ARRAY_ELEMENTS_OFFSET+(graph_2->instruction_parameters[0].i<<2),0,NULL);
} else {
if (check_index_flag)
graph_2=g_bounds (graph_1,graph_2);
@@ -6999,13 +7064,13 @@ static void code_updateI (VOID)
# ifdef M68000
if (mc68000_flag){
graph_2=g_lsl (g_load_i (2),graph_2);
- graph_4=g_store_x (graph_3,graph_1,12,0,graph_2);
+ graph_4=g_store_x (graph_3,graph_1,ARRAY_ELEMENTS_OFFSET,0,graph_2);
} else
# endif
{
int offset;
- graph_2=optimize_array_index (12,2,graph_2,&offset);
+ graph_2=optimize_array_index (ARRAY_ELEMENTS_OFFSET,2,graph_2,&offset);
graph_4=g_store_x (graph_3,graph_1,offset,2,graph_2);
}
#else
@@ -7037,18 +7102,18 @@ static void code_updateR (VOID)
{
int offset;
- offset=12+(graph_2->instruction_parameters[0].i<<3);
+ offset=REAL_ARRAY_ELEMENTS_OFFSET+(graph_2->instruction_parameters[0].i<<3);
graph_7=g_store_x (graph_3,graph_1,offset,0,NULL);
graph_8=g_store_x (graph_4,graph_7,offset+4,0,NULL);
} else {
if (mc68000_flag){
graph_5=g_load_i (3);
graph_6=g_lsl (graph_5,graph_2);
- graph_7=g_store_x (graph_3,graph_1,12,0,graph_6);
- graph_8=g_store_x (graph_4,graph_7,16,0,graph_6);
+ graph_7=g_store_x (graph_3,graph_1,REAL_ARRAY_ELEMENTS_OFFSET,0,graph_6);
+ graph_8=g_store_x (graph_4,graph_7,REAL_ARRAY_ELEMENTS_OFFSET+4,0,graph_6);
} else {
- graph_7=g_store_x (graph_3,graph_1,12,3,graph_2);
- graph_8=g_store_x (graph_4,graph_7,16,3,graph_2);
+ graph_7=g_store_x (graph_3,graph_1,REAL_ARRAY_ELEMENTS_OFFSET,3,graph_2);
+ graph_8=g_store_x (graph_4,graph_7,REAL_ARRAY_ELEMENTS_OFFSET+4,3,graph_2);
}
}
} else
@@ -7057,24 +7122,27 @@ static void code_updateR (VOID)
graph_7=g_fjoin (graph_3,graph_4);
if (!check_index_flag && graph_2->instruction_code==GLOAD_I &&
- LESS_UNSIGNED (graph_2->instruction_parameters[0].i,(MAX_INDIRECT_OFFSET-12)>>3))
+ LESS_UNSIGNED (graph_2->instruction_parameters[0].i,(MAX_INDIRECT_OFFSET-REAL_ARRAY_ELEMENTS_OFFSET)>>3))
{
- graph_8=g_fstore_x (graph_7,graph_1,12+(graph_2->instruction_parameters[0].i<<3),0,NULL);
+ graph_8=g_fstore_x (graph_7,graph_1,REAL_ARRAY_ELEMENTS_OFFSET+(graph_2->instruction_parameters[0].i<<3),0,NULL);
} else {
#if defined (M68000) || defined (I486)
int offset;
- graph_2=optimize_array_index (12,3,graph_2,&offset);
+ graph_2=optimize_array_index (REAL_ARRAY_ELEMENTS_OFFSET,3,graph_2,&offset);
graph_8=g_fstore_x (graph_7,graph_1,offset,3,graph_2);
#else
graph_2=g_lsl_3_add_12 (graph_2);
-# ifdef sparc
- graph_8=g_fstore_x (graph_7,graph_1,12,0,graph_2);
+# if defined (sparc) && !defined (ALIGN_REAL_ARRAYS)
+ graph_8=g_fstore_x (graph_7,graph_1,REAL_ARRAY_ELEMENTS_OFFSET,0,graph_2);
# else
graph_8=g_fstore_x (graph_7,graph_1,0,0,graph_2);
# endif
#endif
}
+#ifdef ALIGN_REAL_ARRAYS
+ graph_8->inode_arity |= LOAD_STORE_ALIGNED_REAL;
+#endif
}
s_put_a (0,graph_8);
@@ -7169,7 +7237,7 @@ void code_update (char element_descriptor[],int a_size,int b_size)
if (element_descriptor[1]=='O' && element_descriptor[2]=='O' && element_descriptor[3]=='L' &&
element_descriptor[4]=='\0')
{
- code_updateBC (12);
+ code_updateBC (ARRAY_ELEMENTS_OFFSET);
return;
}
break;
@@ -7177,7 +7245,11 @@ void code_update (char element_descriptor[],int a_size,int b_size)
if (element_descriptor[1]=='H' && element_descriptor[2]=='A' && element_descriptor[3]=='R' &&
element_descriptor[4]=='\0')
{
+#ifdef ARRAY_SIZE_BEFORE_DESCRIPTOR
+ code_updateBC (4);
+#else
code_updateBC (8);
+#endif
return;
}
break;
diff --git a/cgcodep.h b/cgcodep.h
index aa7ab92..55022fb 100644
--- a/cgcodep.h
+++ b/cgcodep.h
@@ -15,9 +15,7 @@
# define ULONG unsigned long
#endif
-#if defined (I486) || defined (G_POWER)
void code_absR (void);
-#endif
void code_acosR (VOID);
void code_add_args (int source_offset,int n_arguments,int destination_offset);
void code_addI (VOID);
@@ -115,6 +113,7 @@ void code_fillR_b (int b_offset,int a_offset);
void code_fill_a (int from_offset,int to_offset);
void code_get_desc_arity (int a_offset);
void code_get_node_arity (int a_offset);
+void code_get_desc_flags_b (void);
void code_gtC (VOID);
void code_gtI (VOID);
void code_gtR (VOID);
@@ -153,9 +152,7 @@ void code_mulI (VOID);
void code_mulIo (VOID);
#endif
void code_mulR (VOID);
-#if defined (I486) || defined (G_POWER)
void code_negI (void);
-#endif
void code_negR (VOID);
void code_new_ext_reducer (char descriptor_name[],int a_offset);
void code_new_int_reducer (char label_name[],int a_offset);
diff --git a/cginput.c b/cginput.c
index 5f0216c..4b0685d 100644
--- a/cginput.c
+++ b/cginput.c
@@ -1349,14 +1349,15 @@ static int parse_directive_desc (InstructionP instruction)
STRING a1,a2,a3,s;
int l;
LONG n;
- int f;
+ LONG f;
parse_label (a1);
parse_label (a2);
parse_label (a3);
- if (!parse_unsigned_integer (&n) || !parse_0_or_1 (&f) || !parse_descriptor_string (s,&l))
+
+ if (!parse_unsigned_integer (&n) || !parse_unsigned_integer (&f) || !parse_descriptor_string (s,&l))
return 0;
- instruction->instruction_code_function (a1,a2,a3,(int)n,f,s,l);
+ instruction->instruction_code_function (a1,a2,a3,(int)n,(int)f,s,l);
return 1;
}
@@ -1717,9 +1718,7 @@ static void put_instruction_name
static void put_instructions_in_table (void)
{
-#if defined (I486) || defined (G_POWER)
put_instruction_name ("absR", parse_instruction, code_absR );
-#endif
put_instruction_name ("acosR", parse_instruction, code_acosR );
put_instruction_name ("add_args", parse_instruction_n_n_n, code_add_args );
put_instruction_name ("addI", parse_instruction, code_addI );
@@ -1812,6 +1811,7 @@ static void put_instructions_in_table (void)
put_instruction_name ("fill_r", parse_instruction_a_n_n_n_n_n, code_fill_r );
put_instruction_name ("getWL", parse_instruction_n, code_dummy );
put_instruction_name ("get_desc_arity", parse_instruction_n, code_get_desc_arity );
+ put_instruction_name ("get_desc_flags_b", parse_instruction, code_get_desc_flags_b );
put_instruction_name ("get_node_arity", parse_instruction_n, code_get_node_arity );
put_instruction_name ("gtC", parse_instruction, code_gtC );
put_instruction_name ("gtI", parse_instruction, code_gtI );
@@ -1849,9 +1849,7 @@ static void put_instructions_in_table (void)
put_instruction_name ("modI", parse_instruction, code_remI );
put_instruction_name ("mulI", parse_instruction, code_mulI );
put_instruction_name ("mulR", parse_instruction, code_mulR );
-#if defined (I486) || defined (G_POWER)
put_instruction_name ("negI", parse_instruction, code_negI );
-#endif
put_instruction_name ("negR", parse_instruction, code_negR );
put_instruction_name ("new_ext_reducer",parse_instruction_a_n, code_new_ext_reducer );
put_instruction_name ("new_int_reducer",parse_instruction_a_n, code_new_int_reducer );
diff --git a/cglin.c b/cglin.c
index 0d4224b..2ebea11 100644
--- a/cglin.c
+++ b/cglin.c
@@ -27,6 +27,14 @@
# define IF_G_POWER(a)
#endif
+#define LOAD_X_TO_ADDRESS 1
+#define LOAD_X_TO_REGISTER 2
+
+#ifdef sparc
+# undef ALIGN_REAL_ARRAYS
+# undef LOAD_STORE_ALIGNED_REAL 4
+#endif
+
/* from cgcode.c : */
extern struct basic_block *first_block,*last_block;
@@ -396,7 +404,7 @@ void i_fmove_fr_fr (int register_1,int register_2)
void i_fmove_fr_id (int register_1,int offset,int register_2)
{
- register struct instruction *instruction;
+ struct instruction *instruction;
instruction=i_new_instruction2 (IFMOVE);
@@ -405,8 +413,27 @@ void i_fmove_fr_id (int register_1,int offset,int register_2)
instruction->instruction_parameters[1].parameter_type=P_INDIRECT;
instruction->instruction_parameters[1].parameter_offset=offset;
instruction->instruction_parameters[1].parameter_data.i=register_2;
+#ifdef ALIGN_REAL_ARRAYS
+ instruction->instruction_parameters[1].parameter_flags=0;
+#endif
}
+#ifdef ALIGN_REAL_ARRAYS
+void i_fmove_fr_id_f (int register_1,int offset,int register_2,int flags)
+{
+ struct instruction *instruction;
+
+ instruction=i_new_instruction2 (IFMOVE);
+
+ set_float_register_parameter (instruction->instruction_parameters[0],register_1);
+
+ instruction->instruction_parameters[1].parameter_type=P_INDIRECT;
+ instruction->instruction_parameters[1].parameter_offset=offset;
+ instruction->instruction_parameters[1].parameter_data.i=register_2;
+ instruction->instruction_parameters[1].parameter_flags=flags;
+}
+#endif
+
#ifdef M68000
void i_fmove_fr_pd (int register_1,int register_2)
{
@@ -433,7 +460,11 @@ void i_fmove_fr_pi (int register_1,int register_2)
}
#endif
+#ifdef ALIGN_REAL_ARRAYS
+static void i_fmove_fr_x (int register_1,int offset,int register_2,int register_3,int flags)
+#else
static void i_fmove_fr_x (int register_1,int offset,int register_2,int register_3)
+#endif
{
struct instruction *instruction;
struct index_registers *index_registers;
@@ -444,6 +475,9 @@ static void i_fmove_fr_x (int register_1,int offset,int register_2,int register_
set_float_register_parameter (instruction->instruction_parameters[0],register_1);
S3(instruction->instruction_parameters[1],parameter_type=P_INDEXED,parameter_offset=offset,parameter_data.ir=index_registers);
+#ifdef ALIGN_REAL_ARRAYS
+ instruction->instruction_parameters[1].parameter_flags=flags;
+#endif
index_registers->a_reg.r=register_2;
index_registers->d_reg.r=register_3;
@@ -458,10 +492,29 @@ void i_fmove_id_fr (int offset,int register_2,int register_1)
instruction->instruction_parameters[0].parameter_type=P_INDIRECT;
instruction->instruction_parameters[0].parameter_offset=offset;
instruction->instruction_parameters[0].parameter_data.i=register_2;
+#ifdef ALIGN_REAL_ARRAYS
+ instruction->instruction_parameters[0].parameter_flags=0;
+#endif
set_float_register_parameter (instruction->instruction_parameters[1],register_1);
}
+#ifdef ALIGN_REAL_ARRAYS
+void i_fmove_id_fr_f (int offset,int register_2,int register_1,int flags)
+{
+ struct instruction *instruction;
+
+ instruction=i_new_instruction2 (IFMOVE);
+
+ instruction->instruction_parameters[0].parameter_type=P_INDIRECT;
+ instruction->instruction_parameters[0].parameter_offset=offset;
+ instruction->instruction_parameters[0].parameter_data.i=register_2;
+ instruction->instruction_parameters[0].parameter_flags=flags;
+
+ set_float_register_parameter (instruction->instruction_parameters[1],register_1);
+}
+#endif
+
#ifdef M68000
void i_fmove_pd_fr (int register_1,int register_2)
{
@@ -515,7 +568,11 @@ static void i_fmovel_fr_r (int register_1,int register_2)
parameter_data.i=register_2);
}
+#ifdef ALIGN_REAL_ARRAYS
+static void i_fmove_x_fr (int offset,int register_1,int register_2,int register_3,int flags)
+#else
static void i_fmove_x_fr (int offset,int register_1,int register_2,int register_3)
+#endif
{
struct instruction *instruction;
struct index_registers *index_registers;
@@ -526,7 +583,9 @@ static void i_fmove_x_fr (int offset,int register_1,int register_2,int register_
instruction->instruction_parameters[0].parameter_type=P_INDEXED;
instruction->instruction_parameters[0].parameter_offset=offset;
instruction->instruction_parameters[0].parameter_data.ir=index_registers;
-
+#ifdef ALIGN_REAL_ARRAYS
+ instruction->instruction_parameters[0].parameter_flags=flags;
+#endif
index_registers->a_reg.r=register_1;
index_registers->d_reg.r=register_2;
@@ -2011,9 +2070,8 @@ static void ad_to_parameter (ADDRESS *ad_p,struct parameter *parameter_p)
load_x_graph=(INSTRUCTION_GRAPH)ad_p->ad_offset;
i_ad_p=(ADDRESS *)load_x_graph->instruction_parameters[1].p;
- if (load_x_graph->inode_arity==1){
- load_x_graph->inode_arity=2;
-
+ if (load_x_graph->inode_arity & LOAD_X_TO_ADDRESS){
+ load_x_graph->inode_arity ^= (LOAD_X_TO_ADDRESS | LOAD_X_TO_REGISTER);
if (i_ad_p->ad_mode==P_INDEXED){
index_registers=(struct index_registers*)fast_memory_allocate (sizeof (struct index_registers));
@@ -2072,6 +2130,9 @@ static int fad_to_parameter (ADDRESS *ad_p,struct parameter *parameter_p)
parameter_p->parameter_type=P_INDIRECT;
parameter_p->parameter_offset=ad_p->ad_offset;
parameter_p->parameter_data.i=ad_p->ad_register;
+#ifdef ALIGN_REAL_ARRAYS
+ parameter_p->parameter_flags=0;
+#endif
if (--*ad_p->ad_count_p==0)
free_aregister (ad_p->ad_register);
break;
@@ -2089,9 +2150,8 @@ static int fad_to_parameter (ADDRESS *ad_p,struct parameter *parameter_p)
load_x_graph=(INSTRUCTION_GRAPH)ad_p->ad_offset;
i_ad_p=(ADDRESS *)load_x_graph->instruction_parameters[1].p;
- if (load_x_graph->inode_arity==1){
- load_x_graph->inode_arity=2;
-
+ if (load_x_graph->inode_arity & LOAD_X_TO_ADDRESS){
+ load_x_graph->inode_arity ^= (LOAD_X_TO_ADDRESS | LOAD_X_TO_REGISTER);
if (i_ad_p->ad_mode==P_INDEXED){
index_registers=(struct index_registers*)fast_memory_allocate (sizeof (struct index_registers));
@@ -2114,6 +2174,9 @@ static int fad_to_parameter (ADDRESS *ad_p,struct parameter *parameter_p)
if (--*i_ad_p->ad_count_p==0)
free_aregister (i_ad_p->ad_register);
}
+#ifdef ALIGN_REAL_ARRAYS
+ parameter_p->parameter_flags = load_x_graph->inode_arity & LOAD_STORE_ALIGNED_REAL;
+#endif
} else {
U2(parameter_p,parameter_type=P_REGISTER,parameter_data.i=i_ad_p->ad_register);
@@ -2350,8 +2413,8 @@ static void in_register (register ADDRESS *ad_p)
load_x_graph=(INSTRUCTION_GRAPH)ad_p->ad_offset;
i_ad_p=(ADDRESS *)load_x_graph->instruction_parameters[1].p;
- if (load_x_graph->inode_arity==1){
- load_x_graph->inode_arity=2;
+ if (load_x_graph->inode_arity & LOAD_X_TO_ADDRESS){
+ load_x_graph->inode_arity ^= (LOAD_X_TO_ADDRESS | LOAD_X_TO_REGISTER);
if (i_ad_p->ad_mode==P_INDEXED){
if (--*i_ad_p->ad_count_p==0)
free_aregister (i_ad_p->ad_areg);
@@ -2418,8 +2481,8 @@ static void in_data_register (register ADDRESS *ad_p)
load_x_graph=(INSTRUCTION_GRAPH)ad_p->ad_offset;
i_ad_p=(ADDRESS *)load_x_graph->instruction_parameters[1].p;
- if (load_x_graph->inode_arity==1){
- load_x_graph->inode_arity=2;
+ if (load_x_graph->inode_arity & LOAD_X_TO_ADDRESS){
+ load_x_graph->inode_arity ^= (LOAD_X_TO_ADDRESS | LOAD_X_TO_REGISTER);
if (i_ad_p->ad_mode==P_INDEXED){
if (--*i_ad_p->ad_count_p==0)
free_aregister (i_ad_p->ad_areg);
@@ -2500,8 +2563,8 @@ static void in_alterable_data_register (register ADDRESS *ad_p)
load_x_graph=(INSTRUCTION_GRAPH)ad_p->ad_offset;
i_ad_p=(ADDRESS *)load_x_graph->instruction_parameters[1].p;
- if (load_x_graph->inode_arity==1){
- load_x_graph->inode_arity=2;
+ if (load_x_graph->inode_arity & LOAD_X_TO_ADDRESS){
+ load_x_graph->inode_arity ^= (LOAD_X_TO_ADDRESS | LOAD_X_TO_REGISTER);
if (i_ad_p->ad_mode==P_INDEXED){
if (--*i_ad_p->ad_count_p==0)
free_aregister (i_ad_p->ad_areg);
@@ -2587,8 +2650,8 @@ static void in_address_register (register ADDRESS *ad_p)
load_x_graph=(INSTRUCTION_GRAPH)ad_p->ad_offset;
i_ad_p=(ADDRESS *)load_x_graph->instruction_parameters[1].p;
- if (load_x_graph->inode_arity==1){
- load_x_graph->inode_arity=2;
+ if (load_x_graph->inode_arity & LOAD_X_TO_ADDRESS){
+ load_x_graph->inode_arity ^= (LOAD_X_TO_ADDRESS | LOAD_X_TO_REGISTER);
if (i_ad_p->ad_mode==P_INDEXED){
if (--*i_ad_p->ad_count_p==0)
free_aregister (i_ad_p->ad_areg);
@@ -2669,8 +2732,8 @@ static void in_alterable_address_register (register ADDRESS *ad_p)
load_x_graph=(INSTRUCTION_GRAPH)ad_p->ad_offset;
i_ad_p=(ADDRESS *)load_x_graph->instruction_parameters[1].p;
- if (load_x_graph->inode_arity==1){
- load_x_graph->inode_arity=2;
+ if (load_x_graph->inode_arity & LOAD_X_TO_ADDRESS){
+ load_x_graph->inode_arity ^= (LOAD_X_TO_ADDRESS | LOAD_X_TO_REGISTER);
if (i_ad_p->ad_mode==P_INDEXED){
if (--*i_ad_p->ad_count_p==0)
free_aregister (i_ad_p->ad_areg);
@@ -3380,7 +3443,6 @@ static void linearize_dyadic_non_commutative_data_operator (int i_instruction_co
register_node (graph,reg_1);
}
-#if defined (I486) || defined (G_POWER)
static void linearize_monadic_data_operator (int i_instruction_code,INSTRUCTION_GRAPH graph,ADDRESS *ad_p)
{
INSTRUCTION_GRAPH graph_1;
@@ -3411,7 +3473,6 @@ static void linearize_monadic_data_operator (int i_instruction_code,INSTRUCTION_
if (*ad_p->ad_count_p>1)
register_node (graph,reg_1);
}
-#endif
#if defined (I486) || defined (G_POWER)
static void linearize_div_rem_operator (int i_instruction_code,INSTRUCTION_GRAPH graph,ADDRESS *ad_p)
@@ -3860,8 +3921,8 @@ static void move_float_ad_pi (ADDRESS *ad_p,int areg)
load_x_graph=(INSTRUCTION_GRAPH)ad_p->ad_offset;
i_ad_p=(ADDRESS *)load_x_graph->instruction_parameters[1].p;
- if (load_x_graph->inode_arity==1){
- load_x_graph->inode_arity=2;
+ if (load_x_graph->inode_arity & LOAD_X_TO_ADDRESS){
+ load_x_graph->inode_arity ^= (LOAD_X_TO_ADDRESS | LOAD_X_TO_REGISTER);
if (i_ad_p->ad_mode==P_INDEXED){
i_move_x_pi (i_ad_p->ad_offset,i_ad_p->ad_areg,i_ad_p->ad_dreg,areg);
@@ -3949,8 +4010,8 @@ static void move_float_ad_id (ADDRESS *ad_p,int offset,int areg)
load_x_graph=(INSTRUCTION_GRAPH)ad_p->ad_offset;
i_ad_p=(ADDRESS *)load_x_graph->instruction_parameters[1].p;
- if (load_x_graph->inode_arity==1){
- load_x_graph->inode_arity=2;
+ if (load_x_graph->inode_arity & LOAD_X_TO_ADDRESS){
+ load_x_graph->inode_arity ^= (LOAD_X_TO_ADDRESS | LOAD_X_TO_REGISTER);
if (i_ad_p->ad_mode==P_INDEXED){
#ifdef sparc
@@ -4525,11 +4586,19 @@ static void linearize_fill_operator (INSTRUCTION_GRAPH graph,ADDRESS *ad_p)
memory_free (ad_a);
}
+#ifdef ALIGN_REAL_ARRAYS
+static void move_float_ad_x (ADDRESS *ad_p,int offset,int areg,int dreg,int flags)
+#else
static void move_float_ad_x (ADDRESS *ad_p,int offset,int areg,int dreg)
+#endif
{
switch (ad_p->ad_mode){
case P_F_REGISTER:
+#ifdef ALIGN_REAL_ARRAYS
+ i_fmove_fr_x (ad_p->ad_register,offset,areg,dreg,flags);
+#else
i_fmove_fr_x (ad_p->ad_register,offset,areg,dreg);
+#endif
if (--*ad_p->ad_count_p==0){
#ifdef FP_STACK_OPTIMIZATIONS
last_instruction->instruction_parameters[0].parameter_flags |= FP_REG_LAST_USE;
@@ -4569,8 +4638,8 @@ static void move_float_ad_x (ADDRESS *ad_p,int offset,int areg,int dreg)
load_x_graph=(INSTRUCTION_GRAPH)ad_p->ad_offset;
i_ad_p=(ADDRESS *)load_x_graph->instruction_parameters[1].p;
- if (load_x_graph->inode_arity==1){
- load_x_graph->inode_arity=2;
+ if (load_x_graph->inode_arity & LOAD_X_TO_ADDRESS){
+ load_x_graph->inode_arity ^= (LOAD_X_TO_ADDRESS | LOAD_X_TO_REGISTER);
if (i_ad_p->ad_mode==P_INDEXED){
i_move_x_x (i_ad_p->ad_offset,i_ad_p->ad_areg,i_ad_p->ad_dreg,offset,areg,dreg);
@@ -5026,8 +5095,8 @@ static void in_alterable_float_register (ADDRESS *ad_p)
load_x_graph=(INSTRUCTION_GRAPH)ad_p->ad_offset;
i_ad_p=(ADDRESS *)load_x_graph->instruction_parameters[1].p;
- if (load_x_graph->inode_arity==1){
- load_x_graph->inode_arity=2;
+ if (load_x_graph->inode_arity & LOAD_X_TO_ADDRESS){
+ load_x_graph->inode_arity ^= (LOAD_X_TO_ADDRESS | LOAD_X_TO_REGISTER);
if (i_ad_p->ad_mode==P_INDEXED){
if (--*i_ad_p->ad_count_p==0)
@@ -5035,12 +5104,20 @@ static void in_alterable_float_register (ADDRESS *ad_p)
if (--*i_ad_p->ad_count_p2==0)
free_dregister (i_ad_p->ad_dreg);
freg=get_fregister();
+#ifdef ALIGN_REAL_ARRAYS
+ i_fmove_x_fr (i_ad_p->ad_offset,i_ad_p->ad_areg,i_ad_p->ad_dreg,freg,load_x_graph->inode_arity & LOAD_STORE_ALIGNED_REAL);
+#else
i_fmove_x_fr (i_ad_p->ad_offset,i_ad_p->ad_areg,i_ad_p->ad_dreg,freg);
+#endif
} else {
if (--*i_ad_p->ad_count_p==0)
free_aregister (i_ad_p->ad_register);
freg=get_fregister();
+#ifdef ALIGN_REAL_ARRAYS
+ i_fmove_id_fr_f (i_ad_p->ad_offset,i_ad_p->ad_register,freg,load_x_graph->inode_arity & LOAD_STORE_ALIGNED_REAL);
+#else
i_fmove_id_fr (i_ad_p->ad_offset,i_ad_p->ad_register,freg);
+#endif
}
i_ad_p->ad_register=freg;
} else {
@@ -5084,8 +5161,8 @@ static void in_float_register (ADDRESS *ad_p)
load_x_graph=(INSTRUCTION_GRAPH)ad_p->ad_offset;
i_ad_p=(ADDRESS *)load_x_graph->instruction_parameters[1].p;
- if (load_x_graph->inode_arity==1){
- load_x_graph->inode_arity=2;
+ if (load_x_graph->inode_arity & LOAD_X_TO_ADDRESS){
+ load_x_graph->inode_arity ^= (LOAD_X_TO_ADDRESS | LOAD_X_TO_REGISTER);
if (i_ad_p->ad_mode==P_INDEXED){
if (--*i_ad_p->ad_count_p==0)
@@ -5093,12 +5170,20 @@ static void in_float_register (ADDRESS *ad_p)
if (--*i_ad_p->ad_count_p2==0)
free_dregister (i_ad_p->ad_dreg);
freg=get_fregister();
+#ifdef ALIGN_REAL_ARRAYS
+ i_fmove_x_fr (i_ad_p->ad_offset,i_ad_p->ad_areg,i_ad_p->ad_dreg,freg,load_x_graph->inode_arity & LOAD_STORE_ALIGNED_REAL);
+#else
i_fmove_x_fr (i_ad_p->ad_offset,i_ad_p->ad_areg,i_ad_p->ad_dreg,freg);
+#endif
} else {
if (--*i_ad_p->ad_count_p==0)
free_aregister (i_ad_p->ad_register);
freg=get_fregister();
+#ifdef ALIGN_REAL_ARRAYS
+ i_fmove_id_fr_f (i_ad_p->ad_offset,i_ad_p->ad_register,freg,load_x_graph->inode_arity & LOAD_STORE_ALIGNED_REAL);
+#else
i_fmove_id_fr (i_ad_p->ad_offset,i_ad_p->ad_register,freg);
+#endif
}
i_ad_p->ad_register=freg;
} else {
@@ -5143,6 +5228,9 @@ static void instruction_ad_fr (int instruction_code,ADDRESS *ad_p,int register_1
parameter_p->parameter_type=P_INDIRECT;
parameter_p->parameter_offset=ad_p->ad_offset;
parameter_p->parameter_data.i=ad_p->ad_register;
+#ifdef ALIGN_REAL_ARRAYS
+ parameter_p->parameter_flags=0;
+#endif
if (--*ad_p->ad_count_p==0)
free_aregister (ad_p->ad_register);
break;
@@ -5165,8 +5253,8 @@ static void instruction_ad_fr (int instruction_code,ADDRESS *ad_p,int register_1
load_x_graph=(INSTRUCTION_GRAPH)ad_p->ad_offset;
i_ad_p=(ADDRESS *)load_x_graph->instruction_parameters[1].p;
- if (load_x_graph->inode_arity==1){
- load_x_graph->inode_arity=2;
+ if (load_x_graph->inode_arity & LOAD_X_TO_ADDRESS){
+ load_x_graph->inode_arity ^= (LOAD_X_TO_ADDRESS | LOAD_X_TO_REGISTER);
if (i_ad_p->ad_mode==P_INDEXED){
index_registers=(struct index_registers*)fast_memory_allocate (sizeof (struct index_registers));
@@ -5174,7 +5262,7 @@ static void instruction_ad_fr (int instruction_code,ADDRESS *ad_p,int register_1
parameter_p->parameter_type=P_INDEXED;
parameter_p->parameter_offset=i_ad_p->ad_offset;
parameter_p->parameter_data.ir=index_registers;
-
+
index_registers->a_reg.r=i_ad_p->ad_areg;
index_registers->d_reg.r=i_ad_p->ad_dreg;
@@ -5186,10 +5274,13 @@ static void instruction_ad_fr (int instruction_code,ADDRESS *ad_p,int register_1
parameter_p->parameter_type=P_INDIRECT;
parameter_p->parameter_offset=i_ad_p->ad_offset;
parameter_p->parameter_data.i=i_ad_p->ad_register;
-
+
if (--*i_ad_p->ad_count_p==0)
free_aregister (i_ad_p->ad_register);
}
+#ifdef ALIGN_REAL_ARRAYS
+ parameter_p->parameter_flags = load_x_graph->inode_arity & LOAD_STORE_ALIGNED_REAL;
+#endif
} else {
set_float_register_parameter (*parameter_p,i_ad_p->ad_register);
if (--*i_ad_p->ad_count_p==0){
@@ -5338,8 +5429,8 @@ static void linearize_fhigh_operator (register INSTRUCTION_GRAPH graph,register
if (graph->node_count>1){
int reg;
- if (load_x_graph->inode_arity==1){
- load_x_graph->inode_arity=2;
+ if (load_x_graph->inode_arity & LOAD_X_TO_ADDRESS){
+ load_x_graph->inode_arity ^= (LOAD_X_TO_ADDRESS | LOAD_X_TO_REGISTER);
if (i_ad_p->ad_mode==P_INDEXED){
if (--*i_ad_p->ad_count_p==0)
@@ -5388,7 +5479,7 @@ static void linearize_fhigh_operator (register INSTRUCTION_GRAPH graph,register
register_node (graph,reg);
} else {
- if (load_x_graph->inode_arity==1){
+ if (load_x_graph->inode_arity & LOAD_X_TO_ADDRESS){
} else {
local_data_offset-=FLOAT_SIZE;
@@ -5521,8 +5612,8 @@ static void linearize_flow_operator (register INSTRUCTION_GRAPH graph,register A
if (graph->node_count>1){
int reg;
- if (load_x_graph->inode_arity==1){
- load_x_graph->inode_arity=2;
+ if (load_x_graph->inode_arity & LOAD_X_TO_ADDRESS){
+ load_x_graph->inode_arity ^= (LOAD_X_TO_ADDRESS | LOAD_X_TO_REGISTER);
if (i_ad_p->ad_mode==P_INDEXED){
if (--*i_ad_p->ad_count_p==0)
@@ -5554,7 +5645,7 @@ static void linearize_flow_operator (register INSTRUCTION_GRAPH graph,register A
graph->instruction_code=P_REGISTER;
graph->instruction_parameters[0].i=reg;
} else {
- if (load_x_graph->inode_arity==1){
+ if (load_x_graph->inode_arity & LOAD_X_TO_ADDRESS){
if (i_ad_p->ad_mode==P_INDEXED)
i_ad_p->ad_offset+=4<<2;
else
@@ -5884,7 +5975,7 @@ static void linearize_float_keep_operator (INSTRUCTION_GRAPH graph,ADDRESS *ad_p
}
}
-static void linearize_fload_x_operator (register INSTRUCTION_GRAPH graph,register ADDRESS *ad_p)
+static void linearize_fload_x_operator (INSTRUCTION_GRAPH graph,ADDRESS *ad_p)
{
INSTRUCTION_GRAPH graph_1,graph_2;
int offset;
@@ -5931,7 +6022,7 @@ static void linearize_fload_x_operator (register INSTRUCTION_GRAPH graph,registe
ad_p->ad_count2=ad_1.ad_count;
}
graph->node_count=0;
- graph->inode_arity=1;
+ graph->inode_arity|=LOAD_X_TO_ADDRESS;
} else {
int reg_1;
@@ -5941,8 +6032,11 @@ static void linearize_fload_x_operator (register INSTRUCTION_GRAPH graph,registe
free_dregister (ad_1.ad_register);
reg_1=get_fregister();
+#ifdef ALIGN_REAL_ARRAYS
+ i_fmove_x_fr (offset,ad_p->ad_register,ad_1.ad_register,reg_1,graph->inode_arity & LOAD_STORE_ALIGNED_REAL);
+#else
i_fmove_x_fr (offset,ad_p->ad_register,ad_1.ad_register,reg_1);
-
+#endif
ad_p->ad_mode=P_F_REGISTER;
ad_p->ad_register=reg_1;
ad_p->ad_count_p=&graph->node_count;
@@ -5968,7 +6062,7 @@ static void linearize_fload_x_operator (register INSTRUCTION_GRAPH graph,registe
i_ad_p->ad_count_p=ad_p->ad_count_p;
graph->node_count=0;
- graph->inode_arity=1;
+ graph->inode_arity|=LOAD_X_TO_ADDRESS;
} else {
int reg_1;
@@ -5976,12 +6070,15 @@ static void linearize_fload_x_operator (register INSTRUCTION_GRAPH graph,registe
free_aregister (ad_p->ad_register);
reg_1=get_fregister();
+#ifdef ALIGN_REAL_ARRAYS
+ i_fmove_id_fr_f (offset>>2,ad_p->ad_register,reg_1,graph->inode_arity & LOAD_STORE_ALIGNED_REAL);
+#else
i_fmove_id_fr (offset>>2,ad_p->ad_register,reg_1);
-
+#endif
ad_p->ad_mode=P_F_REGISTER;
ad_p->ad_register=reg_1;
ad_p->ad_count_p=&graph->node_count;
-
+
float_register_node (graph,reg_1);
}
}
@@ -6107,11 +6204,9 @@ static void linearize_float_graph (register INSTRUCTION_GRAPH graph,register ADD
case GFNEG:
linearize_monadic_float_operator (graph,ad_p,IFNEG);
break;
-#if defined (I486) || defined (G_POWER)
case GFABS:
linearize_monadic_float_operator (graph,ad_p,IFABS);
break;
-#endif
case GFSIN:
linearize_monadic_float_operator (graph,ad_p,IFSIN);
break;
@@ -6439,7 +6534,7 @@ static void linearize_load_x_operator (INSTRUCTION_GRAPH graph,ADDRESS *ad_p
}
graph->node_count=0;
- graph->inode_arity=1;
+ graph->inode_arity|=LOAD_X_TO_ADDRESS;
} else {
int reg_1;
@@ -6486,7 +6581,7 @@ static void linearize_load_x_operator (INSTRUCTION_GRAPH graph,ADDRESS *ad_p
i_ad_p->ad_count_p=ad_p->ad_count_p;
graph->node_count=0;
- graph->inode_arity=1;
+ graph->inode_arity|=LOAD_X_TO_ADDRESS;
} else {
int reg_1;
@@ -6640,7 +6735,7 @@ static void linearize_store_r_node (INSTRUCTION_GRAPH graph)
load_x_graph=(INSTRUCTION_GRAPH)ad_1.ad_offset;
i_ad_p=(ADDRESS *)load_x_graph->instruction_parameters[1].p;
#ifdef M68000
- if (load_x_graph->inode_arity==1 && i_ad_p->ad_mode==P_INDEXED)
+ if ((load_x_graph->inode_arity & LOAD_X_TO_ADDRESS) && i_ad_p->ad_mode==P_INDEXED)
--*i_ad_p->ad_count_p2;
#endif
--*i_ad_p->ad_count_p;
@@ -6689,7 +6784,7 @@ static void linearize_store_r_node (INSTRUCTION_GRAPH graph)
load_x_graph=(INSTRUCTION_GRAPH)ad_1.ad_offset;
i_ad_p=(ADDRESS *)load_x_graph->instruction_parameters[1].p;
#ifdef M68000
- if (load_x_graph->inode_arity==1 && i_ad_p->ad_mode==P_INDEXED)
+ if ((load_x_graph->inode_arity & LOAD_X_TO_ADDRESS) && i_ad_p->ad_mode==P_INDEXED)
++*i_ad_p->ad_count_p2;
#endif
++*i_ad_p->ad_count_p;
@@ -6768,7 +6863,7 @@ static void linearize_load_b_x_operator (register INSTRUCTION_GRAPH graph,regist
ad_p->ad_count_p=&graph->node_count;
if (graph->node_count<=1)
- graph->inode_arity=2;
+ graph->inode_arity=(graph->inode_arity & ~LOAD_X_TO_ADDRESS) | LOAD_X_TO_REGISTER;
else
register_node (graph,reg_2);
}
@@ -6807,7 +6902,7 @@ static void linearize_load_b_x_operator (register INSTRUCTION_GRAPH graph,regist
ad_p->ad_count_p=&graph->node_count;
if (graph->node_count<=1)
- graph->inode_arity=2;
+ graph->inode_arity=(graph->inode_arity & ~LOAD_X_TO_ADDRESS) | LOAD_X_TO_REGISTER;
else
register_node (graph,reg_1);
}
@@ -6841,7 +6936,7 @@ static void linearize_load_b_x_operator (register INSTRUCTION_GRAPH graph,regist
ad_p->ad_count_p=&graph->node_count;
if (graph->node_count<=1)
- graph->inode_arity=2;
+ graph->inode_arity=(graph->inode_arity & ~LOAD_X_TO_ADDRESS) | LOAD_X_TO_REGISTER;
else
register_node (graph,reg_1);
}
@@ -6886,13 +6981,13 @@ static void do_array_selects_before_update (INSTRUCTION_GRAPH select_graph,INSTR
#endif
);
--select_graph->node_count;
- } else if (select_graph->inode_arity==1 && select_graph!=graph_1){
+ } else if ((select_graph->inode_arity & LOAD_X_TO_ADDRESS) && select_graph!=graph_1){
ADDRESS *i_ad_p;
int dreg;
i_ad_p=(ADDRESS *)select_graph->instruction_parameters[1].p;
- select_graph->inode_arity=2;
+ select_graph->inode_arity ^= (LOAD_X_TO_ADDRESS | LOAD_X_TO_REGISTER);
if (i_ad_p->ad_mode==P_INDEXED){
if (--*i_ad_p->ad_count_p==0)
@@ -6917,7 +7012,7 @@ static void do_array_selects_before_update (INSTRUCTION_GRAPH select_graph,INSTR
#else
if (selects_from_array (select_graph->instruction_parameters[0].p,graph_2)){
#endif
- if (select_graph->node_count>0 /* added 29-2-2000: */ && select_graph->inode_arity!=2 /**/){
+ if (select_graph->node_count>0 /* added 29-2-2000: */ && !(select_graph->inode_arity & LOAD_X_TO_REGISTER) /**/){
ADDRESS s_ad;
++select_graph->node_count;
@@ -6938,13 +7033,13 @@ static void do_array_selects_before_update (INSTRUCTION_GRAPH select_graph,INSTR
++select_graph->node_count;
linearize_fload_x_operator (select_graph,&s_ad);
--select_graph->node_count;
- } else if (select_graph->inode_arity==1 && select_graph!=graph_1){
+ } else if ((select_graph->inode_arity & LOAD_X_TO_ADDRESS) && select_graph!=graph_1){
ADDRESS *i_ad_p;
int freg;
i_ad_p=(ADDRESS *)select_graph->instruction_parameters[1].p;
- select_graph->inode_arity=2;
+ select_graph->inode_arity ^= (LOAD_X_TO_ADDRESS | LOAD_X_TO_REGISTER);;
if (i_ad_p->ad_mode==P_INDEXED){
if (--*i_ad_p->ad_count_p==0)
@@ -6952,12 +7047,20 @@ static void do_array_selects_before_update (INSTRUCTION_GRAPH select_graph,INSTR
if (--*i_ad_p->ad_count_p2==0)
free_dregister (i_ad_p->ad_dreg);
freg=get_fregister();
+#ifdef ALIGN_REAL_ARRAYS
+ i_fmove_x_fr (i_ad_p->ad_offset,i_ad_p->ad_areg,i_ad_p->ad_dreg,freg,select_graph->inode_arity & LOAD_STORE_ALIGNED_REAL);
+#else
i_fmove_x_fr (i_ad_p->ad_offset,i_ad_p->ad_areg,i_ad_p->ad_dreg,freg);
+#endif
} else {
if (--*i_ad_p->ad_count_p==0)
free_aregister (i_ad_p->ad_register);
freg=get_fregister();
+#ifdef ALIGN_REAL_ARRAYS
+ i_fmove_id_fr_f (i_ad_p->ad_offset,i_ad_p->ad_register,freg,select_graph->inode_arity & LOAD_STORE_ALIGNED_REAL);
+#else
i_fmove_id_fr (i_ad_p->ad_offset,i_ad_p->ad_register,freg);
+#endif
}
i_ad_p->ad_register=freg;
}
@@ -7637,10 +7740,10 @@ static void linearize_graph (INSTRUCTION_GRAPH graph,ADDRESS *ad_p)
case GFILL_R:
linearize_fill_r_operator (graph,ad_p);
return;
-#if defined (I486) || defined (G_POWER)
case GNEG:
linearize_monadic_data_operator (INEG,graph,ad_p);
return;
+#if defined (I486) || defined (G_POWER)
case GNOT:
linearize_monadic_data_operator (INOT,graph,ad_p);
return;
@@ -7760,9 +7863,20 @@ static void linearize_fstore_x_operator (register INSTRUCTION_GRAPH graph,regist
in_address_register (ad_p);
- if (graph_3==NULL)
+ if (graph_3==NULL){
+#ifdef ALIGN_REAL_ARRAYS
+ if (ad_1.ad_mode==P_F_REGISTER){
+ i_fmove_fr_id_f (ad_1.ad_register,offset>>2,ad_p->ad_register,graph->inode_arity & LOAD_STORE_ALIGNED_REAL);
+ if (--*ad_1.ad_count_p==0){
+# ifdef FP_STACK_OPTIMIZATIONS
+ last_instruction->instruction_parameters[0].parameter_flags |= FP_REG_LAST_USE;
+# endif
+ free_fregister (ad_1.ad_register);
+ }
+ } else
+#endif
move_float_ad_id (&ad_1,offset>>2,ad_p->ad_register);
- else {
+ } else {
in_data_register (&ad_3);
if (--*ad_3.ad_count_p==0)
@@ -7776,7 +7890,11 @@ static void linearize_fstore_x_operator (register INSTRUCTION_GRAPH graph,regist
# endif
in_float_register (&ad_1);
#endif
+#ifdef ALIGN_REAL_ARRAYS
+ move_float_ad_x (&ad_1,offset,ad_p->ad_register,ad_3.ad_register,graph->inode_arity & LOAD_STORE_ALIGNED_REAL);
+#else
move_float_ad_x (&ad_1,offset,ad_p->ad_register,ad_3.ad_register);
+#endif
}
if (graph->node_count>1){
diff --git a/cgsas.c b/cgsas.c
index 3adfcf4..d18d618 100644
--- a/cgsas.c
+++ b/cgsas.c
@@ -12,6 +12,7 @@
#include <elf.h>
#define ELF
+#undef ALIGN_REAL_ARRAYS
#include "cgport.h"
#include "cgrconst.h"
@@ -21,6 +22,12 @@
#include "cgcode.h"
#include "cgswas.h"
+#ifdef ALIGN_REAL_ARRAYS
+# define LOAD_STORE_ALIGNED_REAL 4
+#endif
+
+#define FUNCTION_LEVEL_LINKING
+
#define for_l(v,l,n) for(v=(l);v!=NULL;v=v->n)
#define U4(s,v1,v2,v3,v4) s->v1;s->v2;s->v3;s->v4
@@ -556,7 +563,7 @@ static unsigned char real_reg_num [32] =
#define as_i_abd3(ra,rb,rd,op) store_instruction(0xc0000000|((op)<<19)|(reg_num(rd)<<25)|(reg_num(ra)<<14)|reg_num(rb))
#define as_i_aod3(ra,o,rd,op) store_instruction(0xc0000000|((op)<<19)|(reg_num(rd)<<25)|(reg_num(ra)<<14)|0x2000|((o)&0x1fff))
#define as_i_foa3(fa,o,ra,op) store_instruction(0xc0000000|((op)<<19)|((fa)<<25)|((reg_num(ra))<<14)|0x2000|((o)&0x1fff))
-#define as_i_fab3(fa,ra,rb,op) store_instruction(0xc0000000|((op)<<19)|((fa)<<25)|((reg_num(ra))<<14)|(rb))
+#define as_i_fab3(fa,ra,rb,op) store_instruction(0xc0000000|((op)<<19)|((fa)<<25)|((reg_num(ra))<<14)|(reg_num(rb)))
#define LD_OP 0
#define LDUB_OP 1
@@ -570,6 +577,7 @@ static unsigned char real_reg_num [32] =
#define LDF_OP 0x20
#define LDDF_OP 0x23
#define STF_OP 0x24
+#define STDF_OP 0x27
#define AND_OP 1
#define OR_OP 2
@@ -617,6 +625,7 @@ static unsigned char real_reg_num [32] =
#define as_jmpli(i,ra,rd) as_i_aid2(ra,i,rd,0x38)
#define as_ld(o,ra,rd) as_i_aod3(ra,o,rd,LD_OP)
#define as_lddf(o,ra,fd) as_i_foa3(fd,o,ra,LDDF_OP)
+#define as_lddf_x(ra,rb,fd) as_i_fab3(fd,ra,rb,LDDF_OP)
#define as_ldf(o,ra,fd) as_i_foa3(fd,o,ra,LDF_OP)
#define as_ldf_x(ra,rb,fd) as_i_fab3(fd,ra,rb,LDF_OP)
#define as_ldsh(o,ra,rd) as_i_aod3(ra,o,rd,LDSH_OP)
@@ -624,11 +633,14 @@ static unsigned char real_reg_num [32] =
#define as_ld_x(ra,rb,rd) as_i_abd3(ra,rb,rd,LD_OP)
#define as_fmovs(fa,fd) as_i_ff2(fa,fd,0x34,1);
#define as_fnegs(fa,fd) as_i_ff2(fa,fd,0x34,5);
+#define as_fabss(fa,fd) as_i_ff2(fa,fd,0x34,9);
#define as_or(ra,rb,rd) as_i_abd2(ra,rb,rd,OR_OP)
#define as_orcc(ra,rb,rd) as_i_abd2(ra,rb,rd,0x12)
#define as_ori(ra,i,rd) as_i_aid2(ra,i,rd,OR_OP)
#define as_sethi(i,rd) as_i_id0(i,rd)
#define as_slli(ra,i,rd) as_i_aid2(ra,i,rd,SLL_OP)
+#define as_stdf(fa,o,rd) as_i_foa3(fa,o,rd,STDF_OP)
+#define as_stdf_x(fa,ra,rb) as_i_fab3(fa,ra,rb,STDF_OP)
#define as_stf(fa,o,rd) as_i_foa3(fa,o,rd,STF_OP)
#define as_sub(ra,rb,rd) as_i_abd2(ra,rb,rd,4)
#define as_subcc(ra,rb,rd) as_i_abd2(ra,rb,rd,0x14)
@@ -1294,6 +1306,11 @@ static void w_as_mul_or_div_instruction (struct instruction *instruction,struct
as_mov (REGISTER_O0,instruction->instruction_parameters[1].parameter_data.reg.r);
}
+static void as_neg_instruction (struct instruction *instruction)
+{
+ as_sub (REGISTER_G0,instruction->instruction_parameters[0].parameter_data.reg.r,instruction->instruction_parameters[0].parameter_data.reg.r);
+}
+
#ifndef FUNCTION_LEVEL_LINKING
static int data_section_alignment_mask;
#endif
@@ -1335,62 +1352,131 @@ static void as_load_float_immediate (double float_value,int fp_reg)
as_hi_or_lo_label (new_label,0,LO12_RELOCATION);
}
-static struct parameter as_float_parameter (struct parameter parameter)
+static void as_load_float_indirect (struct parameter *parameter_p,int f_reg)
+{
+#ifdef ALIGN_REAL_ARRAYS
+ if (parameter_p->parameter_flags & LOAD_STORE_ALIGNED_REAL)
+ as_lddf (parameter_p->parameter_offset,parameter_p->parameter_data.reg.r,f_reg<<1);
+ else {
+#endif
+ as_ldf (parameter_p->parameter_offset,parameter_p->parameter_data.reg.r,f_reg<<1);
+ as_ldf (parameter_p->parameter_offset+4,parameter_p->parameter_data.reg.r,(f_reg<<1)+1);
+#ifdef ALIGN_REAL_ARRAYS
+ }
+#endif
+}
+
+static void as_load_float_indexed (struct parameter *parameter_p,int f_reg)
+{
+ int offset;
+
+ offset=parameter_p->parameter_offset>>2;
+
+#ifdef ALIGN_REAL_ARRAYS
+ if (parameter_p->parameter_flags & LOAD_STORE_ALIGNED_REAL){
+ if (offset==0)
+ as_lddf_x (parameter_p->parameter_data.ir->a_reg.r,parameter_p->parameter_data.ir->d_reg.r,f_reg<<1);
+ else {
+ as_add (parameter_p->parameter_data.ir->a_reg.r,parameter_p->parameter_data.ir->d_reg.r,REGISTER_O0);
+ as_lddf (offset,REGISTER_O0,f_reg<<1);
+ }
+ } else {
+#endif
+ as_add (parameter_p->parameter_data.ir->a_reg.r,parameter_p->parameter_data.ir->d_reg.r,REGISTER_O0);
+ as_ldf (offset,REGISTER_O0,f_reg<<1);
+ as_ldf (offset+4,REGISTER_O0,(f_reg<<1)+1);
+#ifdef ALIGN_REAL_ARRAYS
+ }
+#endif
+}
+
+static int as_float_parameter (struct parameter parameter)
{
switch (parameter.parameter_type){
case P_F_IMMEDIATE:
as_load_float_immediate (*parameter.parameter_data.r,15);
-
- parameter.parameter_type=P_F_REGISTER;
- parameter.parameter_data.reg.r=15;
- break;
+ return 15;
case P_INDIRECT:
+#ifdef ALIGN_REAL_ARRAYS
+ if (parameter.parameter_flags & LOAD_STORE_ALIGNED_REAL)
+ as_lddf (parameter.parameter_offset,parameter.parameter_data.reg.r,30);
+ else {
+#endif
as_ldf (parameter.parameter_offset,parameter.parameter_data.reg.r,30);
as_ldf (parameter.parameter_offset+4,parameter.parameter_data.reg.r,31);
-
- parameter.parameter_type=P_F_REGISTER;
- parameter.parameter_data.reg.r=15;
- break;
+#ifdef ALIGN_REAL_ARRAYS
+ }
+#endif
+ return 15;
case P_INDEXED:
+ {
+ int offset;
+
+ offset=parameter.parameter_offset>>2;
+
+#ifdef ALIGN_REAL_ARRAYS
+ if (parameter.parameter_flags & LOAD_STORE_ALIGNED_REAL){
+ if (offset==0)
+ as_lddf_x (parameter.parameter_data.ir->a_reg.r,parameter.parameter_data.ir->d_reg.r,30);
+ else {
+ as_add (parameter.parameter_data.ir->a_reg.r,parameter.parameter_data.ir->d_reg.r,REGISTER_O0);
+
+ as_lddf (offset,REGISTER_O0,30);
+ }
+ } else {
+#endif
as_add (parameter.parameter_data.ir->a_reg.r,parameter.parameter_data.ir->d_reg.r,REGISTER_O0);
- as_ldf (parameter.parameter_offset>>2,REGISTER_O0,30);
- as_ldf ((parameter.parameter_offset>>2)+4,REGISTER_O0,31);
-
- parameter.parameter_type=P_F_REGISTER;
- parameter.parameter_data.reg.r=15;
- break;
+ as_ldf (offset,REGISTER_O0,30);
+ as_ldf (offset+4,REGISTER_O0,31);
+#ifdef ALIGN_REAL_ARRAYS
+ }
+#endif
+ return 15;
+ }
+ case P_F_REGISTER:
+ return parameter.parameter_data.reg.r;
}
- return parameter;
+ internal_error_in_function ("as_float_parameter");
+ return 0;
}
static void as_compare_float_instruction (struct instruction *instruction)
{
- struct parameter parameter_0;
+ int f_reg;
- parameter_0=as_float_parameter (instruction->instruction_parameters[0]);
+ f_reg=as_float_parameter (instruction->instruction_parameters[0]);
- as_fcmpd (instruction->instruction_parameters[1].parameter_data.reg.r<<1,parameter_0.parameter_data.reg.r<<1);
+ as_fcmpd (instruction->instruction_parameters[1].parameter_data.reg.r<<1,f_reg<<1);
}
static void as_sqrt_float_instruction (struct instruction *instruction)
{
- struct parameter parameter_0;
+ int f_reg;
- parameter_0=as_float_parameter (instruction->instruction_parameters[0]);
+ f_reg=as_float_parameter (instruction->instruction_parameters[0]);
- as_fsqrtd (parameter_0.parameter_data.reg.r<<1,instruction->instruction_parameters[1].parameter_data.reg.r<<1);
+ as_fsqrtd (f_reg<<1,instruction->instruction_parameters[1].parameter_data.reg.r<<1);
}
static void as_neg_float_instruction (struct instruction *instruction)
{
- struct parameter parameter_0;
int freg1,freg2;
- parameter_0=as_float_parameter (instruction->instruction_parameters[0]);
-
- freg1=parameter_0.parameter_data.reg.r;
freg2=instruction->instruction_parameters[1].parameter_data.reg.r;
+
+ switch (instruction->instruction_parameters[0].parameter_type){
+ case P_INDIRECT:
+ as_load_float_indirect (&instruction->instruction_parameters[0],freg2);
+ freg1=freg2;
+ break;
+ case P_INDEXED:
+ as_load_float_indexed (&instruction->instruction_parameters[0],freg2);
+ freg1=freg2;
+ break;
+ default:
+ freg1=as_float_parameter (instruction->instruction_parameters[0]);
+ }
as_fnegs (freg1<<1,freg2<<1);
@@ -1398,14 +1484,38 @@ static void as_neg_float_instruction (struct instruction *instruction)
as_fmovs ((freg1<<1)+1,(freg2<<1)+1);
}
+static void as_abs_float_instruction (struct instruction *instruction)
+{
+ int freg1,freg2;
+
+ freg2=instruction->instruction_parameters[1].parameter_data.reg.r;
+
+ switch (instruction->instruction_parameters[0].parameter_type){
+ case P_INDIRECT:
+ as_load_float_indirect (&instruction->instruction_parameters[0],freg2);
+ freg1=freg2;
+ break;
+ case P_INDEXED:
+ as_load_float_indexed (&instruction->instruction_parameters[0],freg2);
+ freg1=freg2;
+ break;
+ default:
+ freg1=as_float_parameter (instruction->instruction_parameters[0]);
+ }
+
+ as_fabss (freg1<<1,freg2<<1);
+
+ if (freg1!=freg2)
+ as_fmovs ((freg1<<1)+1,(freg2<<1)+1);
+}
+
static void as_tryadic_float_instruction (struct instruction *instruction,int opcode)
{
- struct parameter parameter_0;
+ int f_reg;
- parameter_0=as_float_parameter (instruction->instruction_parameters[0]);
+ f_reg=as_float_parameter (instruction->instruction_parameters[0]);
- as_i_fff2 (instruction->instruction_parameters[1].parameter_data.reg.r<<1,
- parameter_0.parameter_data.reg.r<<1,
+ as_i_fff2 (instruction->instruction_parameters[1].parameter_data.reg.r<<1,f_reg<<1,
instruction->instruction_parameters[1].parameter_data.reg.r<<1,
0x34,opcode);
}
@@ -1429,12 +1539,10 @@ static struct instruction *as_fmove_instruction (struct instruction *instruction
case IFADD: case IFSUB: case IFMUL: case IFDIV:
if (next_instruction->instruction_parameters[1].parameter_data.reg.r==reg1)
{
- struct parameter parameter_0;
int reg_s;
- parameter_0=as_float_parameter (next_instruction->instruction_parameters[0]);
+ reg_s=as_float_parameter (next_instruction->instruction_parameters[0]);
- reg_s=parameter_0.parameter_data.reg.r;
if (reg_s==reg1)
reg_s=reg0;
@@ -1463,25 +1571,10 @@ static struct instruction *as_fmove_instruction (struct instruction *instruction
return instruction;
}
case P_INDIRECT:
- as_ldf (instruction->instruction_parameters[0].parameter_offset,
- instruction->instruction_parameters[0].parameter_data.reg.r,
- instruction->instruction_parameters[1].parameter_data.reg.r<<1);
-
- as_ldf (instruction->instruction_parameters[0].parameter_offset+4,
- instruction->instruction_parameters[0].parameter_data.reg.r,
- (instruction->instruction_parameters[1].parameter_data.reg.r<<1)+1);
-
+ as_load_float_indirect (&instruction->instruction_parameters[0],instruction->instruction_parameters[1].parameter_data.reg.r);
return instruction;
case P_INDEXED:
- as_add (instruction->instruction_parameters[0].parameter_data.ir->a_reg.r,
- instruction->instruction_parameters[0].parameter_data.ir->d_reg.r,REGISTER_O0);
-
- as_ldf (instruction->instruction_parameters[0].parameter_offset>>2,REGISTER_O0,
- instruction->instruction_parameters[1].parameter_data.reg.r<<1);
-
- as_ldf ((instruction->instruction_parameters[0].parameter_offset>>2)+4,REGISTER_O0,
- (instruction->instruction_parameters[1].parameter_data.reg.r<<1)+1);
-
+ as_load_float_indexed (&instruction->instruction_parameters[0],instruction->instruction_parameters[1].parameter_data.reg.r);
return instruction;
case P_F_IMMEDIATE:
as_load_float_immediate (*instruction->instruction_parameters[0].parameter_data.r,instruction->instruction_parameters[1].parameter_data.reg.r);
@@ -1490,6 +1583,13 @@ static struct instruction *as_fmove_instruction (struct instruction *instruction
break;
case P_INDIRECT:
if (instruction->instruction_parameters[0].parameter_type==P_F_REGISTER){
+#ifdef ALIGN_REAL_ARRAYS
+ if (instruction->instruction_parameters[1].parameter_flags & LOAD_STORE_ALIGNED_REAL){
+ as_stdf (instruction->instruction_parameters[0].parameter_data.reg.r<<1,
+ instruction->instruction_parameters[1].parameter_offset,
+ instruction->instruction_parameters[1].parameter_data.reg.r);
+ } else {
+#endif
as_stf (instruction->instruction_parameters[0].parameter_data.reg.r<<1,
instruction->instruction_parameters[1].parameter_offset,
instruction->instruction_parameters[1].parameter_data.reg.r);
@@ -1497,21 +1597,39 @@ static struct instruction *as_fmove_instruction (struct instruction *instruction
as_stf ((instruction->instruction_parameters[0].parameter_data.reg.r<<1)+1,
instruction->instruction_parameters[1].parameter_offset+4,
instruction->instruction_parameters[1].parameter_data.reg.r);
-
+#ifdef ALIGN_REAL_ARRAYS
+ }
+#endif
return instruction;
}
break;
case P_INDEXED:
if (instruction->instruction_parameters[0].parameter_type==P_F_REGISTER){
+ int offset;
+
+ offset=instruction->instruction_parameters[1].parameter_offset>>2;
+#ifdef ALIGN_REAL_ARRAYS
+ if (instruction->instruction_parameters[1].parameter_flags & LOAD_STORE_ALIGNED_REAL){
+ if (offset==0)
+ as_stdf_x (instruction->instruction_parameters[0].parameter_data.reg.r<<1,
+ instruction->instruction_parameters[1].parameter_data.ir->a_reg.r,
+ instruction->instruction_parameters[1].parameter_data.ir->d_reg.r);
+ else {
+ as_add (instruction->instruction_parameters[1].parameter_data.ir->a_reg.r,
+ instruction->instruction_parameters[1].parameter_data.ir->d_reg.r,REGISTER_O0);
+
+ as_stdf (instruction->instruction_parameters[0].parameter_data.reg.r<<1,offset,REGISTER_O0);
+ }
+ } else {
+#endif
as_add (instruction->instruction_parameters[1].parameter_data.ir->a_reg.r,
instruction->instruction_parameters[1].parameter_data.ir->d_reg.r,REGISTER_O0);
- as_stf (instruction->instruction_parameters[0].parameter_data.reg.r<<1,
- instruction->instruction_parameters[1].parameter_offset>>2,REGISTER_O0);
-
- as_stf ((instruction->instruction_parameters[0].parameter_data.reg.r<<1)+1,
- (instruction->instruction_parameters[1].parameter_offset>>2)+4,REGISTER_O0);
-
+ as_stf (instruction->instruction_parameters[0].parameter_data.reg.r<<1,offset,REGISTER_O0);
+ as_stf ((instruction->instruction_parameters[0].parameter_data.reg.r<<1)+1,offset+4,REGISTER_O0);
+#ifdef ALIGN_REAL_ARRAYS
+ }
+#endif
return instruction;
}
}
@@ -1711,6 +1829,9 @@ static void as_instructions (register struct instruction *instruction)
case IMOVEB:
as_move_instruction (instruction,SIZE_BYTE);
break;
+ case INEG:
+ as_neg_instruction (instruction);
+ break;
case IFMOVE:
instruction=as_fmove_instruction (instruction);
break;
@@ -1760,6 +1881,9 @@ static void as_instructions (register struct instruction *instruction)
case IFNEG:
as_neg_float_instruction (instruction);
break;
+ case IFABS:
+ as_abs_float_instruction (instruction);
+ break;
case IFSEQ:
as_set_float_condition_instruction (instruction,FE_COND);
break;
diff --git a/cgswas.c b/cgswas.c
index 3f16c44..f5dca4f 100644
--- a/cgswas.c
+++ b/cgswas.c
@@ -22,6 +22,12 @@
#define SP_G5
+#undef ALIGN_REAL_ARRAYS
+
+#ifdef ALIGN_REAL_ARRAYS
+# define LOAD_STORE_ALIGNED_REAL 4
+#endif
+
static FILE *assembly_file;
static void w_as_newline (VOID)
@@ -417,6 +423,11 @@ static void w_as_fp_register (int fp_reg)
fprintf (assembly_file,"%%f%d",fp_reg);
}
+static void w_as_fp_register_newline (int fp_reg)
+{
+ fprintf (assembly_file,"%%f%d\n",fp_reg);
+}
+
static void w_as_opcode_descriptor (char *opcode,char *label_name,int arity)
{
w_as_opcode (opcode);
@@ -1367,7 +1378,96 @@ static void w_as_word_instruction (struct instruction *instruction)
(int)instruction->instruction_parameters[0].parameter_data.i);
}
-static struct parameter w_as_float_parameter (struct parameter parameter)
+static void w_as_neg_instruction (struct instruction *instruction)
+{
+ w_as_opcode ("sub");
+ w_as_register_comma (REGISTER_G0);
+ w_as_register_comma (instruction->instruction_parameters[0].parameter_data.reg.r);
+ w_as_register (instruction->instruction_parameters[0].parameter_data.reg.r);
+ w_as_newline();
+}
+
+static void w_as_load_float_indirect (struct parameter *parameter_p,int f_reg)
+{
+#ifdef ALIGN_REAL_ARRAYS
+ if (parameter_p->parameter_flags & LOAD_STORE_ALIGNED_REAL){
+ w_as_opcode ("ldd");
+ w_as_indirect (parameter_p->parameter_offset,parameter_p->parameter_data.reg.r);
+ w_as_comma();
+ w_as_fp_register (f_reg<<1);
+ w_as_newline();
+ } else {
+#endif
+
+ w_as_opcode ("ld");
+ w_as_indirect (parameter_p->parameter_offset,parameter_p->parameter_data.reg.r);
+ w_as_comma();
+ w_as_fp_register (f_reg<<1);
+ w_as_newline();
+
+ w_as_opcode ("ld");
+ w_as_indirect (parameter_p->parameter_offset+4,parameter_p->parameter_data.reg.r);
+ w_as_comma();
+ w_as_fp_register ((f_reg<<1)+1);
+ w_as_newline();
+
+#ifdef ALIGN_REAL_ARRAYS
+ }
+#endif
+}
+
+static void w_as_load_float_indexed (struct parameter *parameter_p,int f_reg)
+{
+ int offset;
+
+ offset=parameter_p->parameter_offset>>2;
+
+#ifdef ALIGN_REAL_ARRAYS
+ if (parameter_p->parameter_flags & LOAD_STORE_ALIGNED_REAL){
+ if (offset==0){
+ w_as_opcode ("ldd");
+ w_as_indexed (offset,parameter_p->parameter_data.ir);
+ w_as_comma();
+ w_as_fp_register (f_reg<<1);
+ w_as_newline();
+ } else {
+ w_as_opcode ("add");
+ w_as_register_comma (parameter_p->parameter_data.ir->a_reg.r);
+ w_as_register_comma (parameter_p->parameter_data.ir->d_reg.r);
+ w_as_register_newline (REGISTER_O0);
+
+ w_as_opcode ("ldd");
+ w_as_indirect (offset,REGISTER_O0);
+ w_as_comma();
+ w_as_fp_register (f_reg<<1);
+ w_as_newline();
+ }
+ } else {
+#endif
+
+ w_as_opcode ("add");
+ w_as_register_comma (parameter_p->parameter_data.ir->a_reg.r);
+ w_as_register_comma (parameter_p->parameter_data.ir->d_reg.r);
+ w_as_register_newline (REGISTER_O0);
+
+ w_as_opcode ("ld");
+ w_as_indirect (offset,REGISTER_O0);
+ w_as_comma();
+ w_as_fp_register (f_reg<<1);
+ w_as_newline();
+
+ w_as_opcode ("ld");
+ w_as_indirect (offset+4,REGISTER_O0);
+ w_as_comma();
+ w_as_fp_register ((f_reg<<1)+1);
+ w_as_newline();
+
+#ifdef ALIGN_REAL_ARRAYS
+ }
+#endif
+}
+
+static int w_as_float_parameter (struct parameter parameter)
{
switch (parameter.parameter_type){
case P_F_IMMEDIATE:
@@ -1406,11 +1506,18 @@ static struct parameter w_as_float_parameter (struct parameter parameter)
w_as_fp_register (30);
w_as_newline();
- parameter.parameter_type=P_F_REGISTER;
- parameter.parameter_data.reg.r=15;
- break;
+ return 15;
}
case P_INDIRECT:
+#ifdef ALIGN_REAL_ARRAYS
+ if (parameter.parameter_flags & LOAD_STORE_ALIGNED_REAL){
+ w_as_opcode ("ldd");
+ w_as_indirect (parameter.parameter_offset,parameter.parameter_data.reg.r);
+ w_as_comma();
+ w_as_fp_register (30);
+ w_as_newline();
+ } else {
+#endif
w_as_opcode ("ld");
w_as_indirect (parameter.parameter_offset,parameter.parameter_data.reg.r);
w_as_comma();
@@ -1422,102 +1529,138 @@ static struct parameter w_as_float_parameter (struct parameter parameter)
w_as_comma();
w_as_fp_register (31);
w_as_newline();
-
- parameter.parameter_type=P_F_REGISTER;
- parameter.parameter_data.reg.r=15;
- break;
+#ifdef ALIGN_REAL_ARRAYS
+ }
+#endif
+ return 15;
case P_INDEXED:
+ {
+ int offset;
+
+ offset=parameter.parameter_offset>>2;
+
+#ifdef ALIGN_REAL_ARRAYS
+ if (parameter.parameter_flags & LOAD_STORE_ALIGNED_REAL){
+ if (offset==0){
+ w_as_opcode ("ldd");
+ w_as_indexed (offset,parameter.parameter_data.ir);
+ w_as_comma();
+ w_as_fp_register (30);
+ w_as_newline();
+ } else {
+ w_as_opcode ("add");
+ w_as_register_comma (parameter.parameter_data.ir->a_reg.r);
+ w_as_register_comma (parameter.parameter_data.ir->d_reg.r);
+ w_as_register_newline (REGISTER_O0);
+
+ w_as_opcode ("ldd");
+ w_as_indirect (offset,REGISTER_O0);
+ w_as_comma();
+ w_as_fp_register (30);
+ w_as_newline();
+ }
+ } else {
+#endif
w_as_opcode ("add");
- w_as_register (parameter.parameter_data.ir->a_reg.r);
- w_as_comma();
- w_as_register (parameter.parameter_data.ir->d_reg.r);
- w_as_comma();
- w_as_register (REGISTER_O0);
- w_as_newline();
+ w_as_register_comma (parameter.parameter_data.ir->a_reg.r);
+ w_as_register_comma (parameter.parameter_data.ir->d_reg.r);
+ w_as_register_newline (REGISTER_O0);
w_as_opcode ("ld");
- w_as_indirect (parameter.parameter_offset>>2,REGISTER_O0);
+ w_as_indirect (offset,REGISTER_O0);
w_as_comma();
w_as_fp_register (30);
w_as_newline();
w_as_opcode ("ld");
- w_as_indirect ((parameter.parameter_offset>>2)+4,REGISTER_O0);
+ w_as_indirect (offset+4,REGISTER_O0);
w_as_comma();
w_as_fp_register (31);
w_as_newline();
-
- parameter.parameter_type=P_F_REGISTER;
- parameter.parameter_data.reg.r=15;
- break;
+#ifdef ALIGN_REAL_ARRAYS
+ }
+#endif
+ return 15;
+ case P_F_REGISTER:
+ return parameter.parameter_data.reg.r;
+ }
}
- return parameter;
+
+ internal_error_in_function ("w_as_float_parameter");
+ return 0;
}
static void w_as_compare_float_instruction (struct instruction *instruction)
{
- struct parameter parameter_0;
+ int f_reg;
- parameter_0=w_as_float_parameter (instruction->instruction_parameters[0]);
+ f_reg=w_as_float_parameter (instruction->instruction_parameters[0]);
w_as_opcode_and_d ("fcmp");
w_as_parameter (&instruction->instruction_parameters[1]);
w_as_comma();
- w_as_parameter (&parameter_0);
+ w_as_fp_register (f_reg<<1);
w_as_newline();
}
static void w_as_sqrt_float_instruction (struct instruction *instruction)
{
- struct parameter parameter_0;
+ int f_reg;
- parameter_0=w_as_float_parameter (instruction->instruction_parameters[0]);
+ f_reg=w_as_float_parameter (instruction->instruction_parameters[0]);
w_as_opcode_and_d ("fsqrt");
- w_as_parameter (&parameter_0);
+ w_as_fp_register (f_reg<<1);
w_as_comma();
w_as_parameter (&instruction->instruction_parameters[1]);
w_as_newline();
}
-static void w_as_neg_float_instruction (struct instruction *instruction)
+static void w_as_neg_or_abs_float_instruction (struct instruction *instruction,char *opcode)
{
- struct parameter parameter_0;
int freg1,freg2;
- parameter_0=w_as_float_parameter (instruction->instruction_parameters[0]);
-
- freg1=parameter_0.parameter_data.reg.r;
freg2=instruction->instruction_parameters[1].parameter_data.reg.r;
- w_as_opcode ("fnegs");
+ switch (instruction->instruction_parameters[0].parameter_type){
+ case P_INDIRECT:
+ w_as_load_float_indirect (&instruction->instruction_parameters[0],freg2);
+ freg1=freg2;
+ break;
+ case P_INDEXED:
+ w_as_load_float_indexed (&instruction->instruction_parameters[0],freg2);
+ freg1=freg2;
+ break;
+ default:
+ freg1=w_as_float_parameter (instruction->instruction_parameters[0]);
+ }
+
+ w_as_opcode (opcode);
w_as_fp_register (freg1<<1);
w_as_comma();
- w_as_fp_register (freg2<<1);
- w_as_newline();
+ w_as_fp_register_newline (freg2<<1);
if (freg1!=freg2){
w_as_opcode ("fmovs");
w_as_fp_register ((freg1<<1)+1);
w_as_comma();
- w_as_fp_register ((freg2<<1)+1);
- w_as_newline();
+ w_as_fp_register_newline ((freg2<<1)+1);
}
}
static void w_as_tryadic_float_instruction (struct instruction *instruction,char *opcode)
{
- struct parameter parameter_0;
+ int freg;
- parameter_0=w_as_float_parameter (instruction->instruction_parameters[0]);
+ freg=w_as_float_parameter (instruction->instruction_parameters[0]);
w_as_opcode_and_d (opcode);
w_as_parameter (&instruction->instruction_parameters[1]);
w_as_comma();
- w_as_parameter (&parameter_0);
+ w_as_fp_register (freg<<1);
w_as_comma();
w_as_parameter (&instruction->instruction_parameters[1]);
w_as_newline();
@@ -1542,12 +1685,10 @@ static struct instruction *w_as_fmove_instruction (struct instruction *instructi
case IFADD: case IFSUB: case IFMUL: case IFDIV: case IFREM:
if (next_instruction->instruction_parameters[1].parameter_data.reg.r==reg1)
{
- struct parameter parameter_0;
int reg_s;
- parameter_0=w_as_float_parameter (next_instruction->instruction_parameters[0]);
+ reg_s=w_as_float_parameter (next_instruction->instruction_parameters[0]);
- reg_s=parameter_0.parameter_data.reg.r;
if (reg_s==reg1)
reg_s=reg0;
@@ -1593,42 +1734,12 @@ static struct instruction *w_as_fmove_instruction (struct instruction *instructi
return instruction;
}
case P_INDIRECT:
- w_as_opcode ("ld");
- w_as_indirect (instruction->instruction_parameters[0].parameter_offset,
- instruction->instruction_parameters[0].parameter_data.reg.r);
- w_as_comma();
- w_as_fp_register (instruction->instruction_parameters[1].parameter_data.reg.r<<1);
- w_as_newline();
-
- w_as_opcode ("ld");
- w_as_indirect (instruction->instruction_parameters[0].parameter_offset+4,
- instruction->instruction_parameters[0].parameter_data.reg.r);
- w_as_comma();
- w_as_fp_register ((instruction->instruction_parameters[1].parameter_data.reg.r<<1)+1);
- w_as_newline();
-
+ w_as_load_float_indirect (&instruction->instruction_parameters[0],
+ instruction->instruction_parameters[1].parameter_data.reg.r);
return instruction;
case P_INDEXED:
- w_as_opcode ("add");
- w_as_register (instruction->instruction_parameters[0].parameter_data.ir->a_reg.r);
- w_as_comma();
- w_as_register (instruction->instruction_parameters[0].parameter_data.ir->d_reg.r);
- w_as_comma();
- w_as_register (REGISTER_O0);
- w_as_newline();
-
- w_as_opcode ("ld");
- w_as_indirect (instruction->instruction_parameters[0].parameter_offset>>2,REGISTER_O0);
- w_as_comma();
- w_as_fp_register (instruction->instruction_parameters[1].parameter_data.reg.r<<1);
- w_as_newline();
-
- w_as_opcode ("ld");
- w_as_indirect ((instruction->instruction_parameters[0].parameter_offset>>2)+4,REGISTER_O0);
- w_as_comma();
- w_as_fp_register ((instruction->instruction_parameters[1].parameter_data.reg.r<<1)+1);
- w_as_newline();
-
+ w_as_load_float_indexed (&instruction->instruction_parameters[0],
+ instruction->instruction_parameters[1].parameter_data.reg.r);
return instruction;
case P_F_IMMEDIATE:
{
@@ -1671,6 +1782,18 @@ static struct instruction *w_as_fmove_instruction (struct instruction *instructi
break;
case P_INDIRECT:
if (instruction->instruction_parameters[0].parameter_type==P_F_REGISTER){
+#ifdef ALIGN_REAL_ARRAYS
+ if (instruction->instruction_parameters[1].parameter_flags & LOAD_STORE_ALIGNED_REAL){
+ w_as_opcode ("std");
+ w_as_fp_register (instruction->instruction_parameters[0].parameter_data.reg.r<<1);
+ w_as_comma();
+ w_as_indirect (instruction->instruction_parameters[1].parameter_offset,
+ instruction->instruction_parameters[1].parameter_data.reg.r);
+ w_as_newline();
+
+ return instruction;
+ }
+#endif
w_as_opcode ("st");
w_as_fp_register (instruction->instruction_parameters[0].parameter_data.reg.r<<1);
w_as_comma();
@@ -1688,29 +1811,55 @@ static struct instruction *w_as_fmove_instruction (struct instruction *instructi
}
break;
case P_INDEXED:
+ {
+ int offset;
+
+ offset=instruction->instruction_parameters[1].parameter_offset>>2;
+
+#ifdef ALIGN_REAL_ARRAYS
+ if (instruction->instruction_parameters[1].parameter_flags & LOAD_STORE_ALIGNED_REAL){
+ if (offset==0){
+ w_as_opcode ("std");
+ w_as_fp_register (instruction->instruction_parameters[0].parameter_data.reg.r<<1);
+ w_as_comma();
+ w_as_indexed (offset,instruction->instruction_parameters[1].parameter_data.ir);
+ w_as_newline();
+ } else {
+ w_as_opcode ("add");
+ w_as_register_comma (instruction->instruction_parameters[1].parameter_data.ir->a_reg.r);
+ w_as_register_comma (instruction->instruction_parameters[1].parameter_data.ir->d_reg.r);
+ w_as_register_newline (REGISTER_O0);
+
+ w_as_opcode ("std");
+ w_as_fp_register (instruction->instruction_parameters[0].parameter_data.reg.r<<1);
+ w_as_comma();
+ w_as_indirect (offset,REGISTER_O0);
+ w_as_newline();
+ }
+ return instruction;
+ }
+#endif
if (instruction->instruction_parameters[0].parameter_type==P_F_REGISTER){
w_as_opcode ("add");
- w_as_register (instruction->instruction_parameters[1].parameter_data.ir->a_reg.r);
- w_as_comma();
- w_as_register (instruction->instruction_parameters[1].parameter_data.ir->d_reg.r);
- w_as_comma();
- w_as_register (REGISTER_O0);
- w_as_newline();
+ w_as_register_comma (instruction->instruction_parameters[1].parameter_data.ir->a_reg.r);
+ w_as_register_comma (instruction->instruction_parameters[1].parameter_data.ir->d_reg.r);
+ w_as_register_newline (REGISTER_O0);
w_as_opcode ("st");
w_as_fp_register (instruction->instruction_parameters[0].parameter_data.reg.r<<1);
w_as_comma();
- w_as_indirect (instruction->instruction_parameters[1].parameter_offset>>2,REGISTER_O0);
+ w_as_indirect (offset,REGISTER_O0);
w_as_newline();
w_as_opcode ("st");
w_as_fp_register ((instruction->instruction_parameters[0].parameter_data.reg.r<<1)+1);
w_as_comma();
- w_as_indirect ((instruction->instruction_parameters[1].parameter_offset>>2)+4,REGISTER_O0);
+ w_as_indirect (offset+4,REGISTER_O0);
w_as_newline();
return instruction;
}
+ }
}
internal_error_in_function ("w_as_fmove_instruction");
return instruction;
@@ -1949,6 +2098,9 @@ static void w_as_instructions (register struct instruction *instruction)
case IMOVEB:
w_as_move_instruction (instruction,SIZE_BYTE);
break;
+ case INEG:
+ w_as_neg_instruction (instruction);
+ break;
case IFMOVE:
instruction=w_as_fmove_instruction (instruction);
break;
@@ -1999,7 +2151,10 @@ static void w_as_instructions (register struct instruction *instruction)
w_as_sqrt_float_instruction (instruction);
break;
case IFNEG:
- w_as_neg_float_instruction (instruction);
+ w_as_neg_or_abs_float_instruction (instruction,"fnegs");
+ break;
+ case IFABS:
+ w_as_neg_or_abs_float_instruction (instruction,"fabss");
break;
case IFSEQ:
w_as_set_float_condition_instruction (instruction,"fbe,a");