#define FOSC 8000000ULL #define FCY (FOSC * 4) #include // CONFIG1 #pragma config WPCFG = WPCFGDIS // Write Protect Configuration Page Select->Last page (at the top of program memory) and Flash Configuration Words are not write-protected #pragma config WPDIS = WPDIS // Segment Write Protection Disable->Segmented code protection is disabled #pragma config WPFP = WPFP255 // Write Protection Flash Page Segment Boundary->Highest Page (same as page 170) #pragma config SOSCSEL = EC // Secondary Oscillator Power Mode Select->External clock (SCLKI) or Digital I/O mode( #pragma config ALTPMP = ALPMPDIS // Alternate PMP Pin Mapping->EPMP pins are in default location mode #pragma config WPEND = WPENDMEM // Segment Write Protection End Page Select->Protected code segment upper boundary is at the last page of program memory; the lower boundary is the code page specified by WPFP #pragma config WUTSEL = LEG // Voltage Regulator Wake-up Time Select->Default regulator start-up time is used // CONFIG2 #pragma config POSCMOD = NONE // Primary Oscillator Select->Primary oscillator is disabled #pragma config FCKSM = CSDCMD // Clock Switching and Fail-Safe Clock Monitor->Clock switching and Fail-Safe Clock Monitor are disabled #pragma config OSCIOFNC = ON // OSCO Pin Configuration->OSCO/CLKO/RC15 functions as port I/O (RC15) #pragma config PLL96MHZ = ON // 96MHz PLL Startup Select->96 MHz PLL is enabled automatically on start-up #pragma config PLLDIV = NODIV // 96 MHz PLL Prescaler Select->Oscillator input is used directly (4 MHz input) #pragma config IOL1WAY = ON // IOLOCK One-Way Set Enable->The IOLOCK bit (OSCCON<6>) can be set once, provided the unlock sequence has been completed. Once set, the Peripheral Pin Select registers cannot be written to a second time. #pragma config FNOSC = FRCPLL // Initial Oscillator Select->Fast RC Oscillator with Postscaler and PLL module (FRCPLL) #pragma config IESO = ON // Internal External Switchover->IESO mode (Two-Speed Start-up) is enabled // CONFIG1 #pragma config WDTPS = PS32768 // Watchdog Timer Postscaler->1:32,768 #pragma config GCP = OFF // General Segment Code Protect->Code protection is disabled #pragma config FWDTEN = OFF // Watchdog Timer->Watchdog Timer is disabled #pragma config ICS = PGx1 // Emulator Pin Placement Select bits->Emulator functions are shared with PGEC1/PGED1 #pragma config WINDIS = OFF // Windowed WDT->Standard Watchdog Timer enabled,(Windowed-mode is disabled) #pragma config JTAGEN = OFF // JTAG Port Enable->JTAG port is disabled #pragma config FWPSA = PR128 // WDT Prescaler->Prescaler ratio of 1:128 #pragma config GWRP = OFF // General Segment Write Protect->Writes to program memory are allowed void init(void);