From 3056e083d78b6edec6bab1ebac3fa9e3708644d7 Mon Sep 17 00:00:00 2001 From: Camil Staps Date: Thu, 20 Aug 2015 22:37:23 +0200 Subject: Initial commit --- .../framework/system/clk/src/sys_clk_static.c | 283 +++++++++++++++++++++ .../default/framework/system/clk/sys_clk_static.h | 65 +++++ .../framework/system/ports/src/sys_ports_static.c | 130 ++++++++++ 3 files changed, 478 insertions(+) create mode 100644 firmware/src/system_config/default/framework/system/clk/src/sys_clk_static.c create mode 100644 firmware/src/system_config/default/framework/system/clk/sys_clk_static.h create mode 100644 firmware/src/system_config/default/framework/system/ports/src/sys_ports_static.c (limited to 'firmware/src/system_config/default/framework') diff --git a/firmware/src/system_config/default/framework/system/clk/src/sys_clk_static.c b/firmware/src/system_config/default/framework/system/clk/src/sys_clk_static.c new file mode 100644 index 0000000..06a146b --- /dev/null +++ b/firmware/src/system_config/default/framework/system/clk/src/sys_clk_static.c @@ -0,0 +1,283 @@ +/******************************************************************************* + SYS CLK Static Functions for Clock System Service + + Company: + Microchip Technology Inc. + + File Name: + sys_clk_static.c + + Summary: + SYS CLK static function implementations for the Clock System Service. + + Description: + The Clock System Service provides a simple interface to manage the oscillators + on Microchip microcontrollers. This file defines the static implementation for the + Clock System Service. + + Remarks: + Static functions incorporate all system clock configuration settings as + determined by the user via the Microchip Harmony Configurator GUI. It provides + static version of the routines, eliminating the need for an object ID or + object handle. + + Static single-open interfaces also eliminate the need for the open handle. +*******************************************************************************/ + +//DOM-IGNORE-BEGIN +/******************************************************************************* +Copyright (c) 2014 released Microchip Technology Inc. All rights reserved. + +Microchip licenses to you the right to use, modify, copy and distribute +Software only when embedded on a Microchip microcontroller or digital signal +controller that is integrated into your product or third party product +(pursuant to the sublicense terms in the accompanying license agreement). + +You should refer to the license agreement accompanying this Software for +additional information regarding your rights and obligations. + +SOFTWARE AND DOCUMENTATION ARE PROVIDED AS IS WITHOUT WARRANTY OF ANY KIND, +EITHER EXPRESS OR IMPLIED, INCLUDING WITHOUT LIMITATION, ANY WARRANTY OF +MERCHANTABILITY, TITLE, NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE. +IN NO EVENT SHALL MICROCHIP OR ITS LICENSORS BE LIABLE OR OBLIGATED UNDER +CONTRACT, NEGLIGENCE, STRICT LIABILITY, CONTRIBUTION, BREACH OF WARRANTY, OR +OTHER LEGAL EQUITABLE THEORY ANY DIRECT OR INDIRECT DAMAGES OR EXPENSES +INCLUDING BUT NOT LIMITED TO ANY INCIDENTAL, SPECIAL, INDIRECT, PUNITIVE OR +CONSEQUENTIAL DAMAGES, LOST PROFITS OR LOST DATA, COST OF PROCUREMENT OF +SUBSTITUTE GOODS, TECHNOLOGY, SERVICES, OR ANY CLAIMS BY THIRD PARTIES +(INCLUDING BUT NOT LIMITED TO ANY DEFENSE THEREOF), OR OTHER SIMILAR COSTS. +*******************************************************************************/ +//DOM-IGNORE-END + +// ***************************************************************************** +// ***************************************************************************** +// Section: Include Files +// ***************************************************************************** +// ***************************************************************************** + +#include "system_config.h" +#include "system_definitions.h" +#include "peripheral/osc/plib_osc.h" + +// ***************************************************************************** +// ***************************************************************************** +// Section: File Scope Functions +// ***************************************************************************** +// ***************************************************************************** + +// ***************************************************************************** +/* Function: + void SYS_CLK_Static_Initialize ( const SYS_CLK_INIT const * clkInit ) + + Summary: + Initializes hardware and internal data structure of the System Clock. + + Description: + This function initializes the hardware and internal data structure of System + Clock Service. + + Remarks: + This is configuration values for the static version of the Clock System Service + module is determined by the user via the Microchip Harmony Configurator GUI. + This template will build a sys_clk_static.h and sys_clk_static.c file with + the configuration per the user's choice. + + The objective is to eliminate the user's need to be knowledgeable in the function of + the 'configuration bits' to configure the system oscillators. +*/ + +void SYS_CLK_Initialize( const SYS_CLK_INIT const * clkInit ) +{ + SYS_DEVCON_SystemUnlock ( ); + + PLIB_OSC_FRCDivisorSelect( OSC_ID_0, OSC_FRC_DIV_1); + + /* Enable Peripheral Bus 1 */ + PLIB_OSC_PBClockDivisorSet (OSC_ID_0, 0, 2 ); + PLIB_OSC_PBOutputClockEnable (OSC_ID_0, 0 ); + /* Disable Peripheral Bus 2 */ + PLIB_OSC_PBOutputClockDisable (OSC_ID_0, 1 ); + + /* Enable Peripheral Bus 3 */ + PLIB_OSC_PBClockDivisorSet (OSC_ID_0, 2, 2 ); + PLIB_OSC_PBOutputClockEnable (OSC_ID_0, 2 ); + /* Enable Peripheral Bus 4 */ + PLIB_OSC_PBClockDivisorSet (OSC_ID_0, 3, 2 ); + PLIB_OSC_PBOutputClockEnable (OSC_ID_0, 3 ); + /* Disable Peripheral Bus 5 */ + PLIB_OSC_PBOutputClockDisable (OSC_ID_0, 4 ); + + /* Enable Peripheral Bus 7 */ + PLIB_OSC_PBClockDivisorSet (OSC_ID_0, 6, 1 ); + PLIB_OSC_PBOutputClockEnable (OSC_ID_0, 6 ); + /* Disable Peripheral Bus 8 */ + PLIB_OSC_PBOutputClockDisable (OSC_ID_0, 7 ); + + /* Disable REFCLKO1*/ + PLIB_OSC_ReferenceOscDisable ( OSC_ID_0, OSC_REFERENCE_1 ); + /* Disable REFCLK1_OE*/ + PLIB_OSC_ReferenceOutputDisable ( OSC_ID_0, OSC_REFERENCE_1 ); + /* Disable REFCLKO2*/ + PLIB_OSC_ReferenceOscDisable ( OSC_ID_0, OSC_REFERENCE_2 ); + /* Disable REFCLK2_OE*/ + PLIB_OSC_ReferenceOutputDisable ( OSC_ID_0, OSC_REFERENCE_2 ); + /* Disable REFCLKO3*/ + PLIB_OSC_ReferenceOscDisable ( OSC_ID_0, OSC_REFERENCE_3 ); + /* Disable REFCLK3_OE*/ + PLIB_OSC_ReferenceOutputDisable ( OSC_ID_0, OSC_REFERENCE_3 ); + /* Disable REFCLKO4*/ + PLIB_OSC_ReferenceOscDisable ( OSC_ID_0, OSC_REFERENCE_4 ); + /* Disable REFCLK4_OE*/ + PLIB_OSC_ReferenceOutputDisable ( OSC_ID_0, OSC_REFERENCE_4 ); + + SYS_DEVCON_SystemLock ( ); +} + +//****************************************************************************** +/* Function: + inline uint32_t SYS_CLK_SystemFrequencyGet ( void ) + + Summary: + Gets the system clock frequency in Hertz. + + Description: + This function gets the System clock frequency in Hertz. + + Precondition: + None. + + Parameters: + None. + + Returns: + System clock frequency in Hertz. + + Example: + + uint32_t sysClockHz; + + sysClockHz = SYS_CLK_SystemFrequencyGet ( ); + + + Remarks: + */ + +inline uint32_t SYS_CLK_SystemFrequencyGet ( void ) +{ + return SYS_CLK_FREQ; +} + +//****************************************************************************** +/* Function: + inline uint32_t SYS_CLK_PeripheralFrequencyGet ( CLK_BUSES_PERIPHERAL peripheralBus ) + + Summary: + Gets the selected clock peripheral bus frequency in Hertz. + + Description: + This function gets the selected peripheral bus clock frequency in Hertz. + + Precondition: + None. + + Parameters: + peripheralBus - Reference clock bus selection. One of the possible value from + CLK_BUSES_PERIPHERAL enum. For devices that do not have multiple + clock channels for Reference clock, CLK_BUS_PERIPHERAL_1 should be + the selection. + + Returns: + Clock frequency in Hertz. + + Example: + + unsigned long peripheralClockHz; + + peripheralClockHz = SYS_CLK_PeripheralFrequencyGet ( CLK_BUS_PERIPHERAL_5 ); + + + Remarks: + Most of the devices doesn't have multiple Peripheral clock buses. In that case, + pass CLK_USB_PERIPHERAL_1 as the bus number. + */ + +inline uint32_t SYS_CLK_PeripheralFrequencyGet ( CLK_BUSES_PERIPHERAL peripheralBus ) +{ + uint32_t freq = 0; + + switch (peripheralBus) + { + case CLK_BUS_PERIPHERAL_1: + freq = SYS_CLK_BUS_PERIPHERAL_1; + break; + case CLK_BUS_PERIPHERAL_2: + break; + case CLK_BUS_PERIPHERAL_3: + freq = SYS_CLK_BUS_PERIPHERAL_3; + break; + case CLK_BUS_PERIPHERAL_4: + freq = SYS_CLK_BUS_PERIPHERAL_4; + break; + case CLK_BUS_PERIPHERAL_5: + break; + case CLK_BUS_PERIPHERAL_7: + freq = SYS_CLK_BUS_PERIPHERAL_7; + break; + case CLK_BUS_PERIPHERAL_8: + break; + } + + return freq; +} + + +//****************************************************************************** +/* Function: + inline uint32_t SYS_CLK_ReferenceClockFrequencyGet ( CLK_BUSES_REFERENCE referenceBus ) + + Summary: + Gets the selected Reference clock bus frequency in Hertz. + + Description: + This function gets frequency of the selected Reference clock bus in Hertz. + + Precondition: + None. + + Parameters: + peripheralBus - Reference clock bus selection. One of the possible value from + CLK_BUSES_REFERENCE enum. For devices that do not have multiple + clock channels for Reference clock, CLK_BUS_REFERENCE_1 should be + the selection. + + Returns: + Clock frequency in Hz. + + Example: + + unsigned long sysClockOutputHz; + + sysClockOutputHz = SYS_CLK_ReferenceClockFrequencyGet ( CLK_BUS_REFERENCE_3 ); + + + Remarks: + */ + +inline uint32_t SYS_CLK_ReferenceClockFrequencyGet ( CLK_BUSES_REFERENCE referenceBus ) +{ + uint32_t freq = 0; + + switch (referenceBus) + { + case CLK_BUS_REFERENCE_1: + break; + case CLK_BUS_REFERENCE_2: + break; + case CLK_BUS_REFERENCE_3: + break; + case CLK_BUS_REFERENCE_4: + break; + } + + return freq; +} \ No newline at end of file diff --git a/firmware/src/system_config/default/framework/system/clk/sys_clk_static.h b/firmware/src/system_config/default/framework/system/clk/sys_clk_static.h new file mode 100644 index 0000000..23a0cf5 --- /dev/null +++ b/firmware/src/system_config/default/framework/system/clk/sys_clk_static.h @@ -0,0 +1,65 @@ +/******************************************************************************* + SYS CLK Static Interface Declarations for Clock System Service + + Company: + Microchip Technology Inc. + + File Name: + sys_clk_static.h + + Summary: + SYS CLK interface declarations for the static system service. + + Description: + The Clock System Service provides a simple interface to manage the oscillators + on Microchip microcontrollers. This file defines the interface + Declarations for the SYS CLK system service. + + Remarks: + Static interfaces incorporate all system clock configuration settings as + determined by the user via the Microchip Harmony Configurator GUI. It provides + static version of the routines, eliminating the need for an object ID or + object handle. + + Static single-open interfaces also eliminate the need for the open handle. +*******************************************************************************/ + +//DOM-IGNORE-BEGIN +/******************************************************************************* +Copyright (c) 2014 released Microchip Technology Inc. All rights reserved. + +Microchip licenses to you the right to use, modify, copy and distribute +Software only when embedded on a Microchip microcontroller or digital signal +controller that is integrated into your product or third party product +(pursuant to the sublicense terms in the accompanying license agreement). + +You should refer to the license agreement accompanying this Software for +additional information regarding your rights and obligations. + +SOFTWARE AND DOCUMENTATION ARE PROVIDED AS IS WITHOUT WARRANTY OF ANY KIND, +EITHER EXPRESS OR IMPLIED, INCLUDING WITHOUT LIMITATION, ANY WARRANTY OF +MERCHANTABILITY, TITLE, NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE. +IN NO EVENT SHALL MICROCHIP OR ITS LICENSORS BE LIABLE OR OBLIGATED UNDER +CONTRACT, NEGLIGENCE, STRICT LIABILITY, CONTRIBUTION, BREACH OF WARRANTY, OR +OTHER LEGAL EQUITABLE THEORY ANY DIRECT OR INDIRECT DAMAGES OR EXPENSES +INCLUDING BUT NOT LIMITED TO ANY INCIDENTAL, SPECIAL, INDIRECT, PUNITIVE OR +CONSEQUENTIAL DAMAGES, LOST PROFITS OR LOST DATA, COST OF PROCUREMENT OF +SUBSTITUTE GOODS, TECHNOLOGY, SERVICES, OR ANY CLAIMS BY THIRD PARTIES +(INCLUDING BUT NOT LIMITED TO ANY DEFENSE THEREOF), OR OTHER SIMILAR COSTS. +*******************************************************************************/ +//DOM-IGNORE-END + +#ifndef _SYS_CLK_STATIC_H +#define _SYS_CLK_STATIC_H + +// ***************************************************************************** +// ***************************************************************************** +// Section: SYS CLK Module Initialization Routine (Static Version) +// ***************************************************************************** +// ***************************************************************************** + +#endif // #ifndef _SYS_CLK_STATIC_H + +/******************************************************************************* + End of File +*/ diff --git a/firmware/src/system_config/default/framework/system/ports/src/sys_ports_static.c b/firmware/src/system_config/default/framework/system/ports/src/sys_ports_static.c new file mode 100644 index 0000000..b125472 --- /dev/null +++ b/firmware/src/system_config/default/framework/system/ports/src/sys_ports_static.c @@ -0,0 +1,130 @@ +/******************************************************************************* + SYS PORTS Static Functions for PORTS System Service + + Company: + Microchip Technology Inc. + + File Name: + sys_ports_static.c + + Summary: + SYS PORTS static function implementations for the Ports System Service. + + Description: + The Ports System Service provides a simple interface to manage the ports + on Microchip microcontrollers. This file defines the static implementation for the + Ports System Service. + + Remarks: + Static functions incorporate all system ports configuration settings as + determined by the user via the Microchip Harmony Configurator GUI. It provides + static version of the routines, eliminating the need for an object ID or + object handle. + +*******************************************************************************/ + +//DOM-IGNORE-BEGIN +/******************************************************************************* +Copyright (c) 2013 released Microchip Technology Inc. All rights reserved. + +Microchip licenses to you the right to use, modify, copy and distribute +Software only when embedded on a Microchip microcontroller or digital signal +controller that is integrated into your product or third party product +(pursuant to the sublicense terms in the accompanying license agreement). + +You should refer to the license agreement accompanying this Software for +additional information regarding your rights and obligations. + +SOFTWARE AND DOCUMENTATION ARE PROVIDED AS IS WITHOUT WARRANTY OF ANY KIND, +EITHER EXPRESS OR IMPLIED, INCLUDING WITHOUT LIMITATION, ANY WARRANTY OF +MERCHANTABILITY, TITLE, NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE. +IN NO EVENT SHALL MICROCHIP OR ITS LICENSORS BE LIABLE OR OBLIGATED UNDER +CONTRACT, NEGLIGENCE, STRICT LIABILITY, CONTRIBUTION, BREACH OF WARRANTY, OR +OTHER LEGAL EQUITABLE THEORY ANY DIRECT OR INDIRECT DAMAGES OR EXPENSES +INCLUDING BUT NOT LIMITED TO ANY INCIDENTAL, SPECIAL, INDIRECT, PUNITIVE OR +CONSEQUENTIAL DAMAGES, LOST PROFITS OR LOST DATA, COST OF PROCUREMENT OF +SUBSTITUTE GOODS, TECHNOLOGY, SERVICES, OR ANY CLAIMS BY THIRD PARTIES +(INCLUDING BUT NOT LIMITED TO ANY DEFENSE THEREOF), OR OTHER SIMILAR COSTS. +*******************************************************************************/ +//DOM-IGNORE-END + +#include "system_config.h" +#include "peripheral/ports/plib_ports.h" +#include "peripheral/int/plib_int.h" + + +void SYS_PORTS_Initialize(void) +{ + + /* PORT B Initialization */ + PLIB_PORTS_OpenDrainEnable(PORTS_ID_0, PORT_CHANNEL_B, SYS_PORT_B_ODC); + PLIB_PORTS_Write( PORTS_ID_0, PORT_CHANNEL_B, SYS_PORT_B_LAT); + PLIB_PORTS_DirectionOutputSet( PORTS_ID_0, PORT_CHANNEL_B, SYS_PORT_B_TRIS ^ 0xFFFF); + PLIB_PORTS_ChangeNoticePerPortTurnOn(PORTS_ID_0, PORT_CHANNEL_B); + PLIB_PORTS_ChannelModeSelect(PORTS_ID_0, PORT_CHANNEL_B, SYS_PORT_B_ANSEL ^ 0xFFFF, PORTS_PIN_MODE_DIGITAL); + PLIB_PORTS_ChannelChangeNoticeEnable(PORTS_ID_0, PORT_CHANNEL_B, SYS_PORT_B_CNEN); + PLIB_PORTS_ChannelChangeNoticePullUpEnable(PORTS_ID_0, PORT_CHANNEL_B, SYS_PORT_B_CNPU); + PLIB_PORTS_ChannelChangeNoticePullDownEnable(PORTS_ID_0, PORT_CHANNEL_B, SYS_PORT_B_CNPD); + + /* PORT C Initialization */ + PLIB_PORTS_OpenDrainEnable(PORTS_ID_0, PORT_CHANNEL_C, SYS_PORT_C_ODC); + PLIB_PORTS_Write( PORTS_ID_0, PORT_CHANNEL_C, SYS_PORT_C_LAT); + PLIB_PORTS_DirectionOutputSet( PORTS_ID_0, PORT_CHANNEL_C, SYS_PORT_C_TRIS ^ 0xFFFF); + PLIB_PORTS_ChangeNoticePerPortTurnOn(PORTS_ID_0, PORT_CHANNEL_C); + PLIB_PORTS_ChannelModeSelect(PORTS_ID_0, PORT_CHANNEL_C, SYS_PORT_C_ANSEL ^ 0xFFFF, PORTS_PIN_MODE_DIGITAL); + PLIB_PORTS_ChannelChangeNoticeEnable(PORTS_ID_0, PORT_CHANNEL_C, SYS_PORT_C_CNEN); + PLIB_PORTS_ChannelChangeNoticePullUpEnable(PORTS_ID_0, PORT_CHANNEL_C, SYS_PORT_C_CNPU); + PLIB_PORTS_ChannelChangeNoticePullDownEnable(PORTS_ID_0, PORT_CHANNEL_C, SYS_PORT_C_CNPD); + + /* PORT D Initialization */ + PLIB_PORTS_OpenDrainEnable(PORTS_ID_0, PORT_CHANNEL_D, SYS_PORT_D_ODC); + PLIB_PORTS_Write( PORTS_ID_0, PORT_CHANNEL_D, SYS_PORT_D_LAT); + PLIB_PORTS_DirectionOutputSet( PORTS_ID_0, PORT_CHANNEL_D, SYS_PORT_D_TRIS ^ 0xFFFF); + PLIB_PORTS_ChangeNoticePerPortTurnOn(PORTS_ID_0, PORT_CHANNEL_D); + PLIB_PORTS_ChannelModeSelect(PORTS_ID_0, PORT_CHANNEL_D, SYS_PORT_D_ANSEL ^ 0xFFFF, PORTS_PIN_MODE_DIGITAL); + PLIB_PORTS_ChannelChangeNoticeEnable(PORTS_ID_0, PORT_CHANNEL_D, SYS_PORT_D_CNEN); + PLIB_PORTS_ChannelChangeNoticePullUpEnable(PORTS_ID_0, PORT_CHANNEL_D, SYS_PORT_D_CNPU); + PLIB_PORTS_ChannelChangeNoticePullDownEnable(PORTS_ID_0, PORT_CHANNEL_D, SYS_PORT_D_CNPD); + + /* PORT E Initialization */ + PLIB_PORTS_OpenDrainEnable(PORTS_ID_0, PORT_CHANNEL_E, SYS_PORT_E_ODC); + PLIB_PORTS_Write( PORTS_ID_0, PORT_CHANNEL_E, SYS_PORT_E_LAT); + PLIB_PORTS_DirectionOutputSet( PORTS_ID_0, PORT_CHANNEL_E, SYS_PORT_E_TRIS ^ 0xFFFF); + PLIB_PORTS_ChangeNoticePerPortTurnOn(PORTS_ID_0, PORT_CHANNEL_E); + PLIB_PORTS_ChannelModeSelect(PORTS_ID_0, PORT_CHANNEL_E, SYS_PORT_E_ANSEL ^ 0xFFFF, PORTS_PIN_MODE_DIGITAL); + PLIB_PORTS_ChannelChangeNoticeEnable(PORTS_ID_0, PORT_CHANNEL_E, SYS_PORT_E_CNEN); + PLIB_PORTS_ChannelChangeNoticePullUpEnable(PORTS_ID_0, PORT_CHANNEL_E, SYS_PORT_E_CNPU); + PLIB_PORTS_ChannelChangeNoticePullDownEnable(PORTS_ID_0, PORT_CHANNEL_E, SYS_PORT_E_CNPD); + + /* PORT F Initialization */ + PLIB_PORTS_OpenDrainEnable(PORTS_ID_0, PORT_CHANNEL_F, SYS_PORT_F_ODC); + PLIB_PORTS_Write( PORTS_ID_0, PORT_CHANNEL_F, SYS_PORT_F_LAT); + PLIB_PORTS_DirectionOutputSet( PORTS_ID_0, PORT_CHANNEL_F, SYS_PORT_F_TRIS ^ 0xFFFF); + PLIB_PORTS_ChangeNoticePerPortTurnOn(PORTS_ID_0, PORT_CHANNEL_F); + PLIB_PORTS_ChannelModeSelect(PORTS_ID_0, PORT_CHANNEL_F, SYS_PORT_F_ANSEL ^ 0xFFFF, PORTS_PIN_MODE_DIGITAL); + PLIB_PORTS_ChannelChangeNoticeEnable(PORTS_ID_0, PORT_CHANNEL_F, SYS_PORT_F_CNEN); + PLIB_PORTS_ChannelChangeNoticePullUpEnable(PORTS_ID_0, PORT_CHANNEL_F, SYS_PORT_F_CNPU); + PLIB_PORTS_ChannelChangeNoticePullDownEnable(PORTS_ID_0, PORT_CHANNEL_F, SYS_PORT_F_CNPD); + + /* PORT G Initialization */ + PLIB_PORTS_OpenDrainEnable(PORTS_ID_0, PORT_CHANNEL_G, SYS_PORT_G_ODC); + PLIB_PORTS_Write( PORTS_ID_0, PORT_CHANNEL_G, SYS_PORT_G_LAT); + PLIB_PORTS_DirectionOutputSet( PORTS_ID_0, PORT_CHANNEL_G, SYS_PORT_G_TRIS ^ 0xFFFF); + PLIB_PORTS_ChangeNoticePerPortTurnOn(PORTS_ID_0, PORT_CHANNEL_G); + PLIB_PORTS_ChannelModeSelect(PORTS_ID_0, PORT_CHANNEL_G, SYS_PORT_G_ANSEL ^ 0xFFFF, PORTS_PIN_MODE_DIGITAL); + PLIB_PORTS_ChannelChangeNoticeEnable(PORTS_ID_0, PORT_CHANNEL_G, SYS_PORT_G_CNEN); + PLIB_PORTS_ChannelChangeNoticePullUpEnable(PORTS_ID_0, PORT_CHANNEL_G, SYS_PORT_G_CNPU); + PLIB_PORTS_ChannelChangeNoticePullDownEnable(PORTS_ID_0, PORT_CHANNEL_G, SYS_PORT_G_CNPD); + + + /* PPS Input Remapping */ + + /* PPS Output Remapping */ + + +} + + +/******************************************************************************* + End of File +*/ -- cgit v1.2.3